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author | Andreas Färber <afaerber@suse.de> | 2013-07-07 12:52:32 +0200 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-07-27 00:04:16 +0200 |
commit | c3ce8eb3c50272d81bfea30ae9a9bd959fd68a54 (patch) | |
tree | 379f89cf69afb6a23f90184f65687e4850d89700 /target-alpha | |
parent | 213c19d69fb9c7537afb8539bbdf12dba90ba0ef (diff) | |
download | hqemu-c3ce8eb3c50272d81bfea30ae9a9bd959fd68a54.zip hqemu-c3ce8eb3c50272d81bfea30ae9a9bd959fd68a54.tar.gz |
target-alpha: Move cpu_gdb_{read,write}_register()
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-alpha')
-rw-r--r-- | target-alpha/gdbstub.c | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/target-alpha/gdbstub.c b/target-alpha/gdbstub.c new file mode 100644 index 0000000..b23afe4 --- /dev/null +++ b/target-alpha/gdbstub.c @@ -0,0 +1,86 @@ +/* + * Alpha gdb server stub + * + * Copyright (c) 2003-2005 Fabrice Bellard + * Copyright (c) 2013 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ + +static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n) +{ + uint64_t val; + CPU_DoubleU d; + + switch (n) { + case 0 ... 30: + val = env->ir[n]; + break; + case 32 ... 62: + d.d = env->fir[n - 32]; + val = d.ll; + break; + case 63: + val = cpu_alpha_load_fpcr(env); + break; + case 64: + val = env->pc; + break; + case 66: + val = env->unique; + break; + case 31: + case 65: + /* 31 really is the zero register; 65 is unassigned in the + gdb protocol, but is still required to occupy 8 bytes. */ + val = 0; + break; + default: + return 0; + } + GET_REGL(val); +} + +static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n) +{ + target_ulong tmp = ldtul_p(mem_buf); + CPU_DoubleU d; + + switch (n) { + case 0 ... 30: + env->ir[n] = tmp; + break; + case 32 ... 62: + d.ll = tmp; + env->fir[n - 32] = d.d; + break; + case 63: + cpu_alpha_store_fpcr(env, tmp); + break; + case 64: + env->pc = tmp; + break; + case 66: + env->unique = tmp; + break; + case 31: + case 65: + /* 31 really is the zero register; 65 is unassigned in the + gdb protocol, but is still required to occupy 8 bytes. */ + break; + default: + return 0; + } + return 8; +} |