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authorYongbok Kim <yongbok.kim@imgtec.com>2015-06-01 12:13:24 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2015-06-11 10:13:28 +0100
commitadc370a48fd26b92188fa4848dfb088578b1936c (patch)
tree1b2663f554501c9a55ed8bb0fa71e0688378c39e /roms
parent3b4afc9e75ab1a95f33e41f462921093f8a109c4 (diff)
downloadhqemu-adc370a48fd26b92188fa4848dfb088578b1936c.zip
hqemu-adc370a48fd26b92188fa4848dfb088578b1936c.tar.gz
target-mips: Misaligned memory accesses for MSA
MIPS SIMD Architecture vector loads and stores require misalignment support. MSA Memory access should work as an atomic operation. Therefore, it has to check validity of all addresses for a vector store access if it is spanning into two pages. Separating helper functions for each data format as format is known in translation. To use mmu_idx from cpu_mmu_index() instead of calculating it from hflag. Removing save_cpu_state() call in translation because it is able to use cpu_restore_state() on fault as GETRA() is passed. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> [leon.alrae@imgtec.com: remove unused do_* functions] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'roms')
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