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authorPeter Maydell <peter.maydell@linaro.org>2012-07-12 10:59:11 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-07-12 10:59:54 +0000
commite42c4db3a3de213f6a374dbdc7e75767dc3bfac2 (patch)
tree424122dfa789561090b8c5f0faaf00eefd8821d1 /qemu-timer.c
parent702a9357897293e804d2ac7550227d0d07ed9fc9 (diff)
downloadhqemu-e42c4db3a3de213f6a374dbdc7e75767dc3bfac2.zip
hqemu-e42c4db3a3de213f6a374dbdc7e75767dc3bfac2.tar.gz
target-arm: Implement TTBCR changes for LPAE
Implement the changes to the TTBCR register required for LPAE: * many fewer bits should be RAZ/WI * since TTBCR changes can result in a change of ASID, we must flush the TLB on writes to it Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'qemu-timer.c')
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