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authorAndreas Färber <afaerber@suse.de>2013-06-29 04:18:45 +0200
committerAndreas Färber <afaerber@suse.de>2013-07-27 00:04:17 +0200
commit5b50e790f9e9403d11b4164193b76530ee85a2a1 (patch)
tree63244f49c1b53b05d1d8ddc795643e376dd55971 /include/qom/cpu.h
parent986a2998932e978e63fc3b7ead1fef81f7aad52e (diff)
downloadhqemu-5b50e790f9e9403d11b4164193b76530ee85a2a1.zip
hqemu-5b50e790f9e9403d11b4164193b76530ee85a2a1.tar.gz
cpu: Introduce CPUClass::gdb_{read,write}_register()
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'include/qom/cpu.h')
-rw-r--r--include/qom/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 195fe59..c001474 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -80,6 +80,8 @@ struct TranslationBlock;
* @synchronize_from_tb: Callback for synchronizing state from a TCG
* #TranslationBlock.
* @get_phys_page_debug: Callback for obtaining a physical address.
+ * @gdb_read_register: Callback for letting GDB read a register.
+ * @gdb_write_register: Callback for letting GDB write a register.
* @vmsd: State description for migration.
* @gdb_num_core_regs: Number of core registers accessible to GDB.
*
@@ -109,6 +111,8 @@ typedef struct CPUClass {
void (*set_pc)(CPUState *cpu, vaddr value);
void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
+ int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
+ int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
int cpuid, void *opaque);
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