summaryrefslogtreecommitdiffstats
path: root/include/hw
diff options
context:
space:
mode:
authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2013-04-16 10:28:35 +1000
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2013-04-16 10:04:23 +0200
commit42bb9c9178ae7ac4c439172b1ae99cc29188a5c6 (patch)
treefaf02d3b510f34a449701c82744a1c701e19569d /include/hw
parent3630ae952a17c2107db25f397233536ef874558e (diff)
downloadhqemu-42bb9c9178ae7ac4c439172b1ae99cc29188a5c6.zip
hqemu-42bb9c9178ae7ac4c439172b1ae99cc29188a5c6.tar.gz
stream: Remove app argument hack
The uint32_t *app argument doesn't exist in real hardware. It was a hack in xilinx_axidma/enet to fake the (secondary) control stream connection. Removed the argument and added the second stream to axienet/dma. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/stream.h5
-rw-r--r--include/hw/xilinx.h21
2 files changed, 15 insertions, 11 deletions
diff --git a/include/hw/stream.h b/include/hw/stream.h
index 5bc47a9..35eb083 100644
--- a/include/hw/stream.h
+++ b/include/hw/stream.h
@@ -43,12 +43,11 @@ typedef struct StreamSlaveClass {
* @buf: Data to write
* @len: Maximum number of bytes to write
*/
- size_t (*push)(StreamSlave *obj, unsigned char *buf, size_t len,
- uint32_t *app);
+ size_t (*push)(StreamSlave *obj, unsigned char *buf, size_t len);
} StreamSlaveClass;
size_t
-stream_push(StreamSlave *sink, uint8_t *buf, size_t len, uint32_t *app);
+stream_push(StreamSlave *sink, uint8_t *buf, size_t len);
bool
stream_can_push(StreamSlave *sink, StreamCanPushNotifyFn notify,
diff --git a/include/hw/xilinx.h b/include/hw/xilinx.h
index 6c1ee21..0c0251a 100644
--- a/include/hw/xilinx.h
+++ b/include/hw/xilinx.h
@@ -55,16 +55,19 @@ xilinx_ethlite_create(NICInfo *nd, hwaddr base, qemu_irq irq,
}
static inline void
-xilinx_axiethernet_init(DeviceState *dev, NICInfo *nd, StreamSlave *peer,
- hwaddr base, qemu_irq irq, int txmem, int rxmem)
+xilinx_axiethernet_init(DeviceState *dev, NICInfo *nd, StreamSlave *ds,
+ StreamSlave *cs, hwaddr base, qemu_irq irq, int txmem,
+ int rxmem)
{
Error *errp = NULL;
qdev_set_nic_properties(dev, nd);
qdev_prop_set_uint32(dev, "rxmem", rxmem);
qdev_prop_set_uint32(dev, "txmem", txmem);
- object_property_set_link(OBJECT(dev), OBJECT(peer), "axistream-connected",
- &errp);
+ object_property_set_link(OBJECT(dev), OBJECT(ds),
+ "axistream-connected", &errp);
+ object_property_set_link(OBJECT(dev), OBJECT(cs),
+ "axistream-control-connected", &errp);
assert_no_error(errp);
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
@@ -72,14 +75,16 @@ xilinx_axiethernet_init(DeviceState *dev, NICInfo *nd, StreamSlave *peer,
}
static inline void
-xilinx_axidma_init(DeviceState *dev, StreamSlave *peer, hwaddr base,
- qemu_irq irq, qemu_irq irq2, int freqhz)
+xilinx_axidma_init(DeviceState *dev, StreamSlave *ds, StreamSlave *cs,
+ hwaddr base, qemu_irq irq, qemu_irq irq2, int freqhz)
{
Error *errp = NULL;
qdev_prop_set_uint32(dev, "freqhz", freqhz);
- object_property_set_link(OBJECT(dev), OBJECT(peer), "axistream-connected",
- &errp);
+ object_property_set_link(OBJECT(dev), OBJECT(ds),
+ "axistream-connected", &errp);
+ object_property_set_link(OBJECT(dev), OBJECT(cs),
+ "axistream-control-connected", &errp);
assert_no_error(errp);
qdev_init_nofail(dev);
OpenPOWER on IntegriCloud