summaryrefslogtreecommitdiffstats
path: root/include/hw/intc/arm_gic_common.h
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2015-10-27 12:00:50 +0000
committerPeter Maydell <peter.maydell@linaro.org>2015-10-27 12:00:50 +0000
commit7cd6de3bb1ca55dfa8f53fb9894803eb33f497b3 (patch)
tree39a45000cac3c751803a66773855c8d6fce25e19 /include/hw/intc/arm_gic_common.h
parent7e038b94e74e1c2d1b3598e2e4b0b5c8b79a7278 (diff)
downloadhqemu-7cd6de3bb1ca55dfa8f53fb9894803eb33f497b3.zip
hqemu-7cd6de3bb1ca55dfa8f53fb9894803eb33f497b3.tar.gz
target-arm: Fix "no 64-bit EL2" assumption in arm_excp_unmasked()
The code in arm_excp_unmasked() suppresses the ability of PSTATE.AIF to mask exceptions from a lower EL targeting EL2 or EL3 if the CPU is 64-bit. This is correct for a target of EL3, but not correct for targeting EL2. Further, we go to some effort to calculate scr and hcr values which are not used at all for the 64-bit CPU case. Rearrange the code to correctly implement the 64-bit CPU logic and keep the hcr/scr calculations in the 32-bit CPU codepath. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1444327729-4120-1-git-send-email-peter.maydell@linaro.org Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'include/hw/intc/arm_gic_common.h')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud