Wrap long lines

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162

9 files changed, 89 insertions, 43 deletions

diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 73dcf5c..b56bb07 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -230,9 +230,12 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
                                           pci_apb_iowrite, s);
 
     cpu_register_physical_memory(special_base + 0x2000ULL, 0x40, apb_config);
-    cpu_register_physical_memory(special_base + 0x1000000ULL, 0x10, pci_mem_config);
-    cpu_register_physical_memory(special_base + 0x2000000ULL, 0x10000, pci_ioport);
-    cpu_register_physical_memory(mem_base, 0x10000000, pci_mem_data); // XXX size should be 4G-prom
+    cpu_register_physical_memory(special_base + 0x1000000ULL, 0x10,
+                                 pci_mem_config);
+    cpu_register_physical_memory(special_base + 0x2000000ULL, 0x10000,
+                                 pci_ioport);
+    cpu_register_physical_memory(mem_base, 0x10000000,
+                                 pci_mem_data); // XXX size should be 4G-prom
 
     d = pci_register_device(s->bus, "Advanced PCI Bus", sizeof(PCIDevice),
                             0, NULL, NULL);
@@ -252,8 +255,10 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
     d->config[0x0E] = 0x00; // header_type
 
     /* APB secondary busses */
-    secondary = pci_bridge_init(s->bus, 8, 0x108e5000, pci_apb_map_irq, "Advanced PCI Bus secondary bridge 1");
-    pci_bridge_init(s->bus, 9, 0x108e5000, pci_apb_map_irq, "Advanced PCI Bus secondary bridge 2");
+    secondary = pci_bridge_init(s->bus, 8, 0x108e5000, pci_apb_map_irq,
+                                "Advanced PCI Bus secondary bridge 1");
+    pci_bridge_init(s->bus, 9, 0x108e5000, pci_apb_map_irq,
+                    "Advanced PCI Bus secondary bridge 2");
     return secondary;
 }
 
diff --git a/hw/cs4231.c b/hw/cs4231.c
index 11a6add..8ba8253 100644
--- a/hw/cs4231.c
+++ b/hw/cs4231.c
@@ -98,7 +98,8 @@ static void cs_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
     DPRINTF("write reg[%d]: 0x%8.8x -> 0x%8.8x\n", saddr, s->regs[saddr], val);
     switch (saddr) {
     case 1:
-        DPRINTF("write dreg[%d]: 0x%2.2x -> 0x%2.2x\n", CS_RAP(s), s->dregs[CS_RAP(s)], val);
+        DPRINTF("write dreg[%d]: 0x%2.2x -> 0x%2.2x\n", CS_RAP(s),
+                s->dregs[CS_RAP(s)], val);
         switch(CS_RAP(s)) {
         case 11:
         case 25: // Read only
diff --git a/hw/eccmemctl.c b/hw/eccmemctl.c
index 772c1c2..fe7f27e 100644
--- a/hw/eccmemctl.c
+++ b/hw/eccmemctl.c
@@ -53,7 +53,8 @@
 
 /* ECC fault control register */
 #define ECC_MER_EE     0x00000001      /* Enable ECC checking */
-#define ECC_MER_EI     0x00000002      /* Enable Interrupts on correctable errors */
+#define ECC_MER_EI     0x00000002      /* Enable Interrupts on
+                                          correctable errors */
 #define ECC_MER_MRR0   0x00000004      /* SIMM 0 */
 #define ECC_MER_MRR1   0x00000008      /* SIMM 1 */
 #define ECC_MER_MRR2   0x00000010      /* SIMM 2 */
@@ -65,7 +66,7 @@
 #define ECC_MER_REU    0x00000200      /* Memory Refresh Enable (600MP) */
 #define ECC_MER_MRR    0x000003fc      /* MRR mask */
 #define ECC_MEM_A      0x00000400      /* Memory controller addr map select */
-#define ECC_MER_DCI    0x00000800      /* Dsiables Coherent Invalidate ACK */
+#define ECC_MER_DCI    0x00000800      /* Disables Coherent Invalidate ACK */
 #define ECC_MER_VER    0x0f000000      /* Version */
 #define ECC_MER_IMPL   0xf0000000      /* Implementation */
 
diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c
index 39851de..6a5d505 100644
--- a/hw/slavio_intctl.c
+++ b/hw/slavio_intctl.c
@@ -99,7 +99,8 @@ static uint32_t slavio_intctl_mem_readl(void *opaque, target_phys_addr_t addr)
     return ret;
 }
 
-static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr,
+                                     uint32_t val)
 {
     SLAVIO_INTCTLState *s = opaque;
     uint32_t saddr;
@@ -115,13 +116,15 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint
         val &= CPU_SOFTIRQ_MASK;
         s->intreg_pending[cpu] &= ~val;
         slavio_check_interrupts(s);
-        DPRINTF("Cleared cpu %d irq mask %x, curmask %x\n", cpu, val, s->intreg_pending[cpu]);
+        DPRINTF("Cleared cpu %d irq mask %x, curmask %x\n", cpu, val,
+                s->intreg_pending[cpu]);
         break;
     case 2: // set softint
         val &= CPU_SOFTIRQ_MASK;
         s->intreg_pending[cpu] |= val;
         slavio_check_interrupts(s);
-        DPRINTF("Set cpu %d irq mask %x, curmask %x\n", cpu, val, s->intreg_pending[cpu]);
+        DPRINTF("Set cpu %d irq mask %x, curmask %x\n", cpu, val,
+                s->intreg_pending[cpu]);
         break;
     default:
         break;
@@ -166,7 +169,8 @@ static uint32_t slavio_intctlm_mem_readl(void *opaque, target_phys_addr_t addr)
     return ret;
 }
 
-static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr,
+                                      uint32_t val)
 {
     SLAVIO_INTCTLState *s = opaque;
     uint32_t saddr;
@@ -178,7 +182,8 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uin
         // Force clear unused bits
         val &= MASTER_IRQ_MASK;
         s->intregm_disabled &= ~val;
-        DPRINTF("Enabled master irq mask %x, curmask %x\n", val, s->intregm_disabled);
+        DPRINTF("Enabled master irq mask %x, curmask %x\n", val,
+                s->intregm_disabled);
         slavio_check_interrupts(s);
         break;
     case 3: // set (disable, clear pending)
@@ -187,7 +192,8 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uin
         s->intregm_disabled |= val;
         s->intregm_pending &= ~val;
         slavio_check_interrupts(s);
-        DPRINTF("Disabled master irq mask %x, curmask %x\n", val, s->intregm_disabled);
+        DPRINTF("Disabled master irq mask %x, curmask %x\n", val,
+                s->intregm_disabled);
         break;
     case 4:
         s->target_cpu = val & (MAX_CPUS - 1);
@@ -219,7 +225,8 @@ void slavio_pic_info(void *opaque)
     for (i = 0; i < MAX_CPUS; i++) {
         term_printf("per-cpu %d: pending 0x%08x\n", i, s->intreg_pending[i]);
     }
-    term_printf("master: pending 0x%08x, disabled 0x%08x\n", s->intregm_pending, s->intregm_disabled);
+    term_printf("master: pending 0x%08x, disabled 0x%08x\n",
+                s->intregm_pending, s->intregm_disabled);
 }
 
 void slavio_irq_info(void *opaque)
@@ -376,16 +383,23 @@ void *slavio_intctl_init(target_phys_addr_t addr, target_phys_addr_t addrg,
 
     s->intbit_to_level = intbit_to_level;
     for (i = 0; i < MAX_CPUS; i++) {
-        slavio_intctl_io_memory = cpu_register_io_memory(0, slavio_intctl_mem_read, slavio_intctl_mem_write, s);
+        slavio_intctl_io_memory = cpu_register_io_memory(0,
+                                                         slavio_intctl_mem_read,
+                                                         slavio_intctl_mem_write,
+                                                         s);
         cpu_register_physical_memory(addr + i * TARGET_PAGE_SIZE, INTCTL_SIZE,
                                      slavio_intctl_io_memory);
         s->cpu_irqs[i] = parent_irq[i];
     }
 
-    slavio_intctlm_io_memory = cpu_register_io_memory(0, slavio_intctlm_mem_read, slavio_intctlm_mem_write, s);
+    slavio_intctlm_io_memory = cpu_register_io_memory(0,
+                                                      slavio_intctlm_mem_read,
+                                                      slavio_intctlm_mem_write,
+                                                      s);
     cpu_register_physical_memory(addrg, INTCTLM_SIZE, slavio_intctlm_io_memory);
 
-    register_savevm("slavio_intctl", addr, 1, slavio_intctl_save, slavio_intctl_load, s);
+    register_savevm("slavio_intctl", addr, 1, slavio_intctl_save,
+                    slavio_intctl_load, s);
     qemu_register_reset(slavio_intctl_reset, s);
     *irq = qemu_allocate_irqs(slavio_set_irq, s, 32);
 
diff --git a/hw/slavio_timer.c b/hw/slavio_timer.c
index 3d9c110..f091fbe 100644
--- a/hw/slavio_timer.c
+++ b/hw/slavio_timer.c
@@ -206,7 +206,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
             s->limit = val & TIMER_MAX_COUNT32;
             if (s->timer) {
                 if (s->limit == 0) /* free-run */
-                    ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 1);
+                    ptimer_set_limit(s->timer,
+                                     LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 1);
                 else
                     ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(s->limit), 1);
             }
@@ -233,7 +234,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
         s->limit = val & TIMER_MAX_COUNT32;
         if (s->timer) {
             if (s->limit == 0)	/* free-run */
-                ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 0);
+                ptimer_set_limit(s->timer,
+                                 LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 0);
             else
                 ptimer_set_limit(s->timer, LIMIT_TO_PERIODS(s->limit), 0);
         }
@@ -271,7 +273,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
                         // user timer limit is always the same
                         s->slave[i]->limit = TIMER_MAX_COUNT64;
                         ptimer_set_limit(s->slave[i]->timer,
-                                         LIMIT_TO_PERIODS(s->slave[i]->limit), 1);
+                                         LIMIT_TO_PERIODS(s->slave[i]->limit),
+                                         1);
                         // set this processors user timer bit in config
                         // register
                         s->slave_mode |= processor;
diff --git a/hw/sun4c_intctl.c b/hw/sun4c_intctl.c
index 510eb2e..88cd4a5 100644
--- a/hw/sun4c_intctl.c
+++ b/hw/sun4c_intctl.c
@@ -68,7 +68,8 @@ static uint32_t sun4c_intctl_mem_readb(void *opaque, target_phys_addr_t addr)
     return ret;
 }
 
-static void sun4c_intctl_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void sun4c_intctl_mem_writeb(void *opaque, target_phys_addr_t addr,
+                                    uint32_t val)
 {
     Sun4c_INTCTLState *s = opaque;
 
@@ -94,7 +95,8 @@ void sun4c_pic_info(void *opaque)
 {
     Sun4c_INTCTLState *s = opaque;
 
-    term_printf("master: pending 0x%2.2x, enabled 0x%2.2x\n", s->pending, s->reg);
+    term_printf("master: pending 0x%2.2x, enabled 0x%2.2x\n", s->pending,
+                s->reg);
 }
 
 void sun4c_irq_info(void *opaque)
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 76caa89..5e0eca4 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -41,7 +41,8 @@
  * Sun4m architecture was used in the following machines:
  *
  * SPARCserver 6xxMP/xx
- * SPARCclassic (SPARCclassic Server)(SPARCstation LC) (4/15), SPARCclassic X (4/10)
+ * SPARCclassic (SPARCclassic Server)(SPARCstation LC) (4/15),
+ * SPARCclassic X (4/10)
  * SPARCstation LX/ZX (4/30)
  * SPARCstation Voyager
  * SPARCstation 10/xx, SPARCserver 10/xx
@@ -327,9 +328,11 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
         kernel_size = load_elf(kernel_filename, -0xf0000000ULL, NULL, NULL,
                                NULL);
         if (kernel_size < 0)
-            kernel_size = load_aout(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR);
+            kernel_size = load_aout(kernel_filename,
+                                    phys_ram_base + KERNEL_LOAD_ADDR);
         if (kernel_size < 0)
-            kernel_size = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR);
+            kernel_size = load_image(kernel_filename,
+                                     phys_ram_base + KERNEL_LOAD_ADDR);
         if (kernel_size < 0) {
             fprintf(stderr, "qemu: could not load kernel '%s'\n",
                     kernel_filename);
@@ -339,7 +342,8 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
         /* load initrd */
         initrd_size = 0;
         if (initrd_filename) {
-            initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
+            initrd_size = load_image(initrd_filename,
+                                     phys_ram_base + INITRD_LOAD_ADDR);
             if (initrd_size < 0) {
                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
                         initrd_filename);
@@ -350,8 +354,10 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
             for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) {
                 if (ldl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i)
                     == 0x48647253) { // HdrS
-                    stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR);
-                    stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, initrd_size);
+                    stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16,
+                            INITRD_LOAD_ADDR);
+                    stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20,
+                            initrd_size);
                     break;
                 }
             }
@@ -409,7 +415,8 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
 
     /* allocate RAM */
     if ((uint64_t)RAM_size > hwdef->max_mem) {
-        fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n",
+        fprintf(stderr,
+                "qemu: Too much memory for this machine: %d, maximum %d\n",
                 (unsigned int)(RAM_size / (1024 * 1024)),
                 (unsigned int)(hwdef->max_mem / (1024 * 1024)));
         exit(1);
@@ -575,7 +582,8 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
 
     /* allocate RAM */
     if ((uint64_t)RAM_size > hwdef->max_mem) {
-        fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n",
+        fprintf(stderr,
+                "qemu: Too much memory for this machine: %d, maximum %d\n",
                 (unsigned int)(RAM_size / (1024 * 1024)),
                 (unsigned int)(hwdef->max_mem / (1024 * 1024)));
         exit(1);
@@ -1127,7 +1135,8 @@ static void ss10_init(ram_addr_t RAM_size, int vga_ram_size,
 /* SPARCserver 600MP hardware initialisation */
 static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size,
                          const char *boot_device, DisplayState *ds,
-                         const char *kernel_filename, const char *kernel_cmdline,
+                         const char *kernel_filename,
+                         const char *kernel_cmdline,
                          const char *initrd_filename, const char *cpu_model)
 {
     sun4m_hw_init(&hwdefs[2], RAM_size, boot_device, ds, kernel_filename,
@@ -1388,7 +1397,8 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
 
     /* allocate RAM */
     if ((uint64_t)RAM_size > hwdef->max_mem) {
-        fprintf(stderr, "qemu: Too much memory for this machine: %d, maximum %d\n",
+        fprintf(stderr,
+                "qemu: Too much memory for this machine: %d, maximum %d\n",
                 (unsigned int)(RAM_size / (1024 * 1024)),
                 (unsigned int)(hwdef->max_mem / (1024 * 1024)));
         exit(1);
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 55c6c63..8c06176 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -72,7 +72,8 @@ extern int nographic;
 
 static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
                                    const unsigned char *arch,
-                                   ram_addr_t RAM_size, const char *boot_devices,
+                                   ram_addr_t RAM_size,
+                                   const char *boot_devices,
                                    uint32_t kernel_image, uint32_t kernel_size,
                                    const char *cmdline,
                                    uint32_t initrd_image, uint32_t initrd_size,
@@ -268,7 +269,8 @@ static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
 
     prom_offset = RAM_size + vga_ram_size;
     cpu_register_physical_memory(PROM_ADDR,
-                                 (PROM_SIZE_MAX + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK,
+                                 (PROM_SIZE_MAX + TARGET_PAGE_SIZE) &
+                                 TARGET_PAGE_MASK,
                                  prom_offset | IO_MEM_ROM);
 
     if (bios_name == NULL)
@@ -287,9 +289,11 @@ static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
         /* XXX: put correct offset */
         kernel_size = load_elf(kernel_filename, 0, NULL, NULL, NULL);
         if (kernel_size < 0)
-            kernel_size = load_aout(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR);
+            kernel_size = load_aout(kernel_filename,
+                                    phys_ram_base + KERNEL_LOAD_ADDR);
         if (kernel_size < 0)
-            kernel_size = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR);
+            kernel_size = load_image(kernel_filename,
+                                     phys_ram_base + KERNEL_LOAD_ADDR);
         if (kernel_size < 0) {
             fprintf(stderr, "qemu: could not load kernel '%s'\n",
                     kernel_filename);
@@ -298,7 +302,8 @@ static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
 
         /* load initrd */
         if (initrd_filename) {
-            initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
+            initrd_size = load_image(initrd_filename,
+                                     phys_ram_base + INITRD_LOAD_ADDR);
             if (initrd_size < 0) {
                 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
                         initrd_filename);
@@ -309,8 +314,10 @@ static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
             for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) {
                 if (ldl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i)
                     == 0x48647253) { // HdrS
-                    stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR);
-                    stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, initrd_size);
+                    stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16,
+                            INITRD_LOAD_ADDR);
+                    stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20,
+                            initrd_size);
                     break;
                 }
             }
@@ -318,7 +325,8 @@ static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
     }
     pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL);
     isa_mem_base = VGA_BASE;
-    pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + RAM_size, RAM_size, vga_ram_size);
+    pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + RAM_size, RAM_size,
+                        vga_ram_size);
 
     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
         if (serial_hds[i]) {
@@ -329,7 +337,8 @@ static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size,
 
     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
         if (parallel_hds[i]) {
-            parallel_init(parallel_io[i], NULL/*parallel_irq[i]*/, parallel_hds[i]);
+            parallel_init(parallel_io[i], NULL/*parallel_irq[i]*/,
+                          parallel_hds[i]);
         }
     }
 
diff --git a/hw/tcx.c b/hw/tcx.c
index 1ab5ecb..c72b999 100644
--- a/hw/tcx.c
+++ b/hw/tcx.c
@@ -516,7 +516,8 @@ void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
     vram_base += size;
 
     io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
-    cpu_register_physical_memory(addr + 0x00200000ULL, TCX_DAC_NREGS, io_memory);
+    cpu_register_physical_memory(addr + 0x00200000ULL, TCX_DAC_NREGS,
+                                 io_memory);
 
     dummy_memory = cpu_register_io_memory(0, tcx_dummy_read, tcx_dummy_write,
                                           s);