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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-03-06 20:28:49 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-03-06 20:28:49 +0000
commit3016d80bff9ba63e67c1b18798180b2a9ffb58c0 (patch)
treef524e53461b9b3823cc909b6497ba9781d03fbad /hw
parent134d77a14b969edf77117f34d9859bb667f9c922 (diff)
downloadhqemu-3016d80bff9ba63e67c1b18798180b2a9ffb58c0.zip
hqemu-3016d80bff9ba63e67c1b18798180b2a9ffb58c0.tar.gz
Register VMware SVGA's memory io region with PCI framework.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4023 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r--hw/vmware_vga.c47
1 files changed, 29 insertions, 18 deletions
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index 2b4c59d..54c320a 100644
--- a/hw/vmware_vga.c
+++ b/hw/vmware_vga.c
@@ -60,6 +60,7 @@ struct vmsvga_state_s {
int vram_size;
#endif
uint8_t *vram;
+ target_phys_addr_t vram_base;
int index;
int scratch_size;
@@ -644,7 +645,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address)
return ((s->depth + 7) >> 3) * s->new_width;
case SVGA_REG_FB_START:
- return SVGA_MEM_BASE;
+ return s->vram_base;
case SVGA_REG_FB_OFFSET:
return 0x0;
@@ -671,7 +672,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address)
return caps;
case SVGA_REG_MEM_START:
- return SVGA_MEM_BASE + s->vram_size - SVGA_FIFO_SIZE;
+ return s->vram_base + s->vram_size - SVGA_FIFO_SIZE;
case SVGA_REG_MEM_SIZE:
return SVGA_FIFO_SIZE;
@@ -961,7 +962,7 @@ static void vmsvga_text_update(void *opaque, console_ch_t *chardata)
static uint32_t vmsvga_vram_readb(void *opaque, target_phys_addr_t addr)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
- addr -= SVGA_MEM_BASE;
+ addr -= s->vram_base;
if (addr < s->fb_size)
return *(uint8_t *) (s->ds->data + addr);
else
@@ -971,7 +972,7 @@ static uint32_t vmsvga_vram_readb(void *opaque, target_phys_addr_t addr)
static uint32_t vmsvga_vram_readw(void *opaque, target_phys_addr_t addr)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
- addr -= SVGA_MEM_BASE;
+ addr -= s->vram_base;
if (addr < s->fb_size)
return *(uint16_t *) (s->ds->data + addr);
else
@@ -981,7 +982,7 @@ static uint32_t vmsvga_vram_readw(void *opaque, target_phys_addr_t addr)
static uint32_t vmsvga_vram_readl(void *opaque, target_phys_addr_t addr)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
- addr -= SVGA_MEM_BASE;
+ addr -= s->vram_base;
if (addr < s->fb_size)
return *(uint32_t *) (s->ds->data + addr);
else
@@ -992,7 +993,7 @@ static void vmsvga_vram_writeb(void *opaque, target_phys_addr_t addr,
uint32_t value)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
- addr -= SVGA_MEM_BASE;
+ addr -= s->vram_base;
if (addr < s->fb_size)
*(uint8_t *) (s->ds->data + addr) = value;
else
@@ -1003,7 +1004,7 @@ static void vmsvga_vram_writew(void *opaque, target_phys_addr_t addr,
uint32_t value)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
- addr -= SVGA_MEM_BASE;
+ addr -= s->vram_base;
if (addr < s->fb_size)
*(uint16_t *) (s->ds->data + addr) = value;
else
@@ -1014,7 +1015,7 @@ static void vmsvga_vram_writel(void *opaque, target_phys_addr_t addr,
uint32_t value)
{
struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque;
- addr -= SVGA_MEM_BASE;
+ addr -= s->vram_base;
if (addr < s->fb_size)
*(uint32_t *) (s->ds->data + addr) = value;
else
@@ -1089,7 +1090,6 @@ static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
uint8_t *vga_ram_base, unsigned long vga_ram_offset,
int vga_ram_size)
{
- int iomemtype;
s->ds = ds;
s->vram = vga_ram_base;
s->vram_size = vga_ram_size;
@@ -1099,15 +1099,6 @@ static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
vmsvga_reset(s);
-#ifdef DIRECT_VRAM
- iomemtype = cpu_register_io_memory(0, vmsvga_vram_read,
- vmsvga_vram_write, s);
-#else
- iomemtype = vga_ram_offset | IO_MEM_RAM;
-#endif
- cpu_register_physical_memory(SVGA_MEM_BASE, vga_ram_size,
- iomemtype);
-
graphic_console_init(ds, vmsvga_update_display,
vmsvga_invalidate_display, vmsvga_screen_dump,
vmsvga_text_update, s);
@@ -1162,6 +1153,24 @@ static void pci_vmsvga_map_ioport(PCIDevice *pci_dev, int region_num,
1, 4, vmsvga_bios_write, s);
}
+static void pci_vmsvga_map_mem(PCIDevice *pci_dev, int region_num,
+ uint32_t addr, uint32_t size, int type)
+{
+ struct pci_vmsvga_state_s *d = (struct pci_vmsvga_state_s *) pci_dev;
+ struct vmsvga_state_s *s = &d->chip;
+ int iomemtype;
+
+ s->vram_base = addr;
+#ifdef DIRECT_VRAM
+ iomemtype = cpu_register_io_memory(0, vmsvga_vram_read,
+ vmsvga_vram_write, s);
+#else
+ iomemtype = 0 | IO_MEM_RAM;
+#endif
+ cpu_register_physical_memory(s->vram_base, s->vram_size,
+ iomemtype);
+}
+
#define PCI_VENDOR_ID_VMWARE 0x15ad
#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
#define PCI_DEVICE_ID_VMWARE_SVGA 0x0710
@@ -1207,6 +1216,8 @@ void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
pci_register_io_region(&s->card, 0, 0x10,
PCI_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport);
+ pci_register_io_region(&s->card, 0, vga_ram_size,
+ PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
vmsvga_init(&s->chip, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
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