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authorPeter Maydell <peter.maydell@linaro.org>2013-03-18 17:20:07 +0000
committerStefan Hajnoczi <stefanha@redhat.com>2013-03-22 13:25:07 +0100
commit085d813407453e498e05c37d988efba8c6f5af0a (patch)
tree3bc30c89ef521b114d59f11ed0fa8a2039faf53a /hw
parenta7b66fa7aefb8dce564f0fa665de7965d3007148 (diff)
downloadhqemu-085d813407453e498e05c37d988efba8c6f5af0a.zip
hqemu-085d813407453e498e05c37d988efba8c6f5af0a.tar.gz
Fix typos and misspellings
Fix various typos and misspellings. The bulk of these were found with codespell. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm-misc.h2
-rw-r--r--hw/pci/pci_host.c2
-rw-r--r--hw/sdhci.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index cba7553..7b2b02d 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -14,7 +14,7 @@
#include "exec/memory.h"
#include "hw/irq.h"
-/* The CPU is also modeled as an interrupt controller. */
+/* The CPU is also modelled as an interrupt controller. */
#define ARM_PIC_CPU_IRQ 0
#define ARM_PIC_CPU_FIQ 1
qemu_irq *arm_pic_init_cpu(ARMCPU *cpu);
diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c
index daca1c1..12254b1 100644
--- a/hw/pci/pci_host.c
+++ b/hw/pci/pci_host.c
@@ -38,7 +38,7 @@ do { printf("pci_host_data: " fmt , ## __VA_ARGS__); } while (0)
* bit 0 - 7: offset in configuration space of a given pci device
*/
-/* the helper functio to get a PCIDeice* for a given pci address */
+/* the helper function to get a PCIDevice* for a given pci address */
static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr)
{
uint8_t bus_num = addr >> 16;
diff --git a/hw/sdhci.c b/hw/sdhci.c
index 93feada..4a29e6c 100644
--- a/hw/sdhci.c
+++ b/hw/sdhci.c
@@ -763,7 +763,7 @@ static void sdhci_do_adma(SDHCIState *s)
}
}
- /* we have unfinished bussiness - reschedule to continue ADMA */
+ /* we have unfinished business - reschedule to continue ADMA */
qemu_mod_timer(s->transfer_timer,
qemu_get_clock_ns(vm_clock) + SDHC_TRANSFER_DELAY);
}
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