diff options
author | Anthony Liguori <aliguori@us.ibm.com> | 2009-12-14 11:36:53 -0600 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2009-12-18 11:26:25 -0600 |
commit | d587e0787153f0224a6140c5015609963ceaabfb (patch) | |
tree | e22dbd01c5f04bc291b8cf4156a7e5a334ee21b9 /hw | |
parent | e249651ca94058547f7ae84694e82bb1ee03bc3c (diff) | |
download | hqemu-d587e0787153f0224a6140c5015609963ceaabfb.zip hqemu-d587e0787153f0224a6140c5015609963ceaabfb.tar.gz |
Revert "pci: interrupt disable bit support"
This reverts commit 0ea5709a32085f7d14901a09d12bd35f9b267607.
Per discussion with Michael Tsirkin, this is too risky for 0.12
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/pci.c | 29 | ||||
-rw-r--r-- | hw/pci.h | 1 |
2 files changed, 2 insertions, 28 deletions
@@ -518,8 +518,7 @@ static void pci_init_wmask(PCIDevice *dev) dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff; dev->wmask[PCI_INTERRUPT_LINE] = 0xff; pci_set_word(dev->wmask + PCI_COMMAND, - PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | - PCI_COMMAND_INTX_DISABLE); + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff, config_size - PCI_CONFIG_HEADER_SIZE); @@ -944,25 +943,6 @@ static void pci_update_mappings(PCIDevice *d) } } -static inline int pci_irq_disabled(PCIDevice *d) -{ - return pci_get_word(d->config + PCI_COMMAND) & PCI_COMMAND_INTX_DISABLE; -} - -/* Called after interrupt disabled field update in config space, - * assert/deassert interrupts if necessary. - * Gets original interrupt disable bit value (before update). */ -static void pci_update_irq_disabled(PCIDevice *d, int was_irq_disabled) -{ - int i, disabled = pci_irq_disabled(d); - if (disabled == was_irq_disabled) - return; - for (i = 0; i < PCI_NUM_PINS; ++i) { - int state = pci_irq_state(d, i); - pci_change_irq_level(d, i, disabled ? -state : state); - } -} - uint32_t pci_default_read_config(PCIDevice *d, uint32_t address, int len) { @@ -975,7 +955,7 @@ uint32_t pci_default_read_config(PCIDevice *d, void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) { - int i, was_irq_disabled = pci_irq_disabled(d); + int i; uint32_t config_size = pci_config_size(d); for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) { @@ -987,9 +967,6 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) || range_covers_byte(addr, l, PCI_COMMAND)) pci_update_mappings(d); - - if (range_covers_byte(addr, l, PCI_COMMAND)) - pci_update_irq_disabled(d, was_irq_disabled); } /***********************************************************/ @@ -1007,8 +984,6 @@ static void pci_set_irq(void *opaque, int irq_num, int level) pci_set_irq_state(pci_dev, irq_num, level); pci_update_irq_status(pci_dev); - if (pci_irq_disabled(pci_dev)) - return; pci_change_irq_level(pci_dev, irq_num, change); } @@ -101,7 +101,6 @@ typedef struct PCIIORegion { #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ #define PCI_COMMAND_MASTER 0x4 /* Enable bus master */ -#define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */ #define PCI_STATUS 0x06 /* 16 bits */ #define PCI_STATUS_INTERRUPT 0x08 #define PCI_REVISION_ID 0x08 /* 8 bits */ |