diff options
| author | Anthony Liguori <aliguori@us.ibm.com> | 2011-12-14 07:59:21 -0600 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2011-12-14 07:59:21 -0600 |
| commit | 9423a2e8dd362a271bfe194ec131062814557b95 (patch) | |
| tree | 6b10b2d69e5d81b6ff4cb2ba75693d8a65362d92 /hw | |
| parent | da5361cc685c004d8bb4e7c5e7b3a52c7aca2c56 (diff) | |
| parent | 126c79133f77d1b0b7c3849899c6d5f83b2fd410 (diff) | |
| download | hqemu-9423a2e8dd362a271bfe194ec131062814557b95.zip hqemu-9423a2e8dd362a271bfe194ec131062814557b95.tar.gz | |
Merge remote-tracking branch 'stefanha/trivial-patches-next' into staging
Diffstat (limited to 'hw')
46 files changed, 86 insertions, 84 deletions
diff --git a/hw/9pfs/codir.c b/hw/9pfs/codir.c index 9b6d47d..3d18828 100644 --- a/hw/9pfs/codir.c +++ b/hw/9pfs/codir.c @@ -90,7 +90,7 @@ int v9fs_co_mkdir(V9fsPDU *pdu, V9fsFidState *fidp, V9fsString *name, V9fsState *s = pdu->s; if (v9fs_request_cancelled(pdu)) { - return -EINTR;; + return -EINTR; } cred_init(&cred); cred.fc_mode = mode; @@ -124,7 +124,7 @@ int v9fs_co_opendir(V9fsPDU *pdu, V9fsFidState *fidp) V9fsState *s = pdu->s; if (v9fs_request_cancelled(pdu)) { - return -EINTR;; + return -EINTR; } v9fs_path_read_lock(s); v9fs_co_run_in_worker( @@ -152,7 +152,7 @@ int v9fs_co_closedir(V9fsPDU *pdu, V9fsFidOpenState *fs) V9fsState *s = pdu->s; if (v9fs_request_cancelled(pdu)) { - return -EINTR;; + return -EINTR; } v9fs_co_run_in_worker( { diff --git a/hw/9pfs/virtio-9p-coth.h b/hw/9pfs/virtio-9p-coth.h index c4b74b0..c31c965 100644 --- a/hw/9pfs/virtio-9p-coth.h +++ b/hw/9pfs/virtio-9p-coth.h @@ -44,7 +44,7 @@ typedef struct V9fsThPool { qemu_coroutine_self()); \ qemu_bh_schedule(co_bh); \ /* \ - * yeild in qemu thread and re-enter back \ + * yield in qemu thread and re-enter back \ * in glib worker thread \ */ \ qemu_coroutine_yield(); \ diff --git a/hw/9pfs/virtio-9p-handle.c b/hw/9pfs/virtio-9p-handle.c index f97d898..b556e39 100644 --- a/hw/9pfs/virtio-9p-handle.c +++ b/hw/9pfs/virtio-9p-handle.c @@ -59,7 +59,7 @@ static inline int open_by_handle(int mountfd, const char *fh, int flags) static int handle_update_file_cred(int dirfd, const char *name, FsCred *credp) { int fd, ret; - fd = openat(dirfd, name, O_NONBLOCK | O_NOFOLLOW);; + fd = openat(dirfd, name, O_NONBLOCK | O_NOFOLLOW); if (fd < 0) { return fd; } @@ -520,7 +520,7 @@ static int handle_name_to_path(FsContext *ctx, V9fsPath *dir_path, } fh = g_malloc(sizeof(struct file_handle) + data->handle_bytes); fh->handle_bytes = data->handle_bytes; - /* add a "./" at the begining of the path */ + /* add a "./" at the beginning of the path */ snprintf(buffer, PATH_MAX, "./%s", name); /* flag = 0 imply don't follow symlink */ ret = name_to_handle(dirfd, buffer, fh, &mnt_id, 0); diff --git a/hw/9pfs/virtio-9p.c b/hw/9pfs/virtio-9p.c index dd43209..36a862f 100644 --- a/hw/9pfs/virtio-9p.c +++ b/hw/9pfs/virtio-9p.c @@ -1492,7 +1492,7 @@ static void v9fs_walk(void *opaque) int32_t fid, newfid; V9fsString *wnames = NULL; V9fsFidState *fidp; - V9fsFidState *newfidp = NULL;; + V9fsFidState *newfidp = NULL; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; @@ -2398,7 +2398,7 @@ static void v9fs_link(void *opaque) V9fsState *s = pdu->s; int32_t dfid, oldfid; V9fsFidState *dfidp, *oldfidp; - V9fsString name;; + V9fsString name; size_t offset = 7; int err = 0; @@ -304,7 +304,7 @@ void acpi_pm_tmr_calc_overflow_time(ACPIPMTimer *tmr) uint32_t acpi_pm_tmr_get(ACPIPMTimer *tmr) { - uint32_t d = acpi_pm_tmr_get_clock();; + uint32_t d = acpi_pm_tmr_get_clock(); return d & 0xffffff; } diff --git a/hw/alpha_dp264.c b/hw/alpha_dp264.c index fcc20e9..598b830 100644 --- a/hw/alpha_dp264.c +++ b/hw/alpha_dp264.c @@ -2,7 +2,7 @@ * QEMU Alpha DP264/CLIPPER hardware system emulator. * * Choose CLIPPER IRQ mappings over, say, DP264, MONET, or WEBBRICK - * variants because CLIPPER doesn't have an SMC669 SuperIO controler + * variants because CLIPPER doesn't have an SMC669 SuperIO controller * that we need to emulate as well. */ diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 66c48fd..9b52119 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -609,7 +609,7 @@ static uint32_t gic_cpu_read(gic_state *s, int cpu, int offset) return 0; case 0x0c: /* Acknowledge */ return gic_acknowledge_irq(s, cpu); - case 0x14: /* Runing Priority */ + case 0x14: /* Running Priority */ return s->running_priority[cpu]; case 0x18: /* Highest Pending Interrupt */ return s->current_pending[cpu]; diff --git a/hw/bt-hci-csr.c b/hw/bt-hci-csr.c index 0dcf897..772b677 100644 --- a/hw/bt-hci-csr.c +++ b/hw/bt-hci-csr.c @@ -222,7 +222,7 @@ static void csrhci_in_packet(struct csrhci_s *s, uint8_t *pkt) rpkt = csrhci_out_packet_csr(s, H4_NEG_PKT, 10); - *rpkt ++ = 0x20; /* Operational settings negotation Ok */ + *rpkt ++ = 0x20; /* Operational settings negotiation Ok */ memcpy(rpkt, pkt, 7); rpkt += 7; *rpkt ++ = 0xff; *rpkt = 0xff; diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c index c7e365b..1b216e8 100644 --- a/hw/cirrus_vga.c +++ b/hw/cirrus_vga.c @@ -783,7 +783,7 @@ static void cirrus_bitblt_cputovideo_next(CirrusVGAState * s) s->cirrus_srccounter -= s->cirrus_blt_srcpitch; if (s->cirrus_srccounter <= 0) goto the_end; - /* more bytes than needed can be transfered because of + /* more bytes than needed can be transferred because of word alignment, so we keep them for the next line */ /* XXX: keep alignment to speed up transfer */ end_ptr = s->cirrus_bltbuf + s->cirrus_blt_srcpitch; diff --git a/hw/ds1225y.c b/hw/ds1225y.c index 59d224e..7aa0832 100644 --- a/hw/ds1225y.c +++ b/hw/ds1225y.c @@ -1,7 +1,7 @@ /* * QEMU NVRAM emulation for DS1225Y chip * - * Copyright (c) 2007-2008 Hervé Poussineau + * Copyright (c) 2007-2008 HervĂ© Poussineau * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal diff --git a/hw/e1000_hw.h b/hw/e1000_hw.h index 2e341ac..9e29af8 100644 --- a/hw/e1000_hw.h +++ b/hw/e1000_hw.h @@ -295,7 +295,7 @@ #define E1000_KUMCTRLSTA 0x00034 /* MAC-PHY interface - RW */ #define E1000_MDPHYA 0x0003C /* PHY address - RW */ -#define E1000_MANC2H 0x05860 /* Managment Control To Host - RW */ +#define E1000_MANC2H 0x05860 /* Management Control To Host - RW */ #define E1000_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */ #define E1000_GCR 0x05B00 /* PCI-Ex Control */ diff --git a/hw/eepro100.c b/hw/eepro100.c index 17bcfd8..6a162f6 100644 --- a/hw/eepro100.c +++ b/hw/eepro100.c @@ -258,7 +258,7 @@ typedef struct { /* Data in mem is always in the byte order of the controller (le). * It must be dword aligned to allow direct access to 32 bit values. */ - uint8_t mem[PCI_MEM_SIZE] __attribute__((aligned(8)));; + uint8_t mem[PCI_MEM_SIZE] __attribute__((aligned(8))); /* Configuration bytes. */ uint8_t configuration[22]; diff --git a/hw/es1370.c b/hw/es1370.c index c5c16b0..6a3ba55 100644 --- a/hw/es1370.c +++ b/hw/es1370.c @@ -788,7 +788,7 @@ static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, int cnt = d->frame_cnt >> 16; int size = d->frame_cnt & 0xffff; int left = ((size - cnt + 1) << 2) + d->leftover; - int transfered = 0; + int transferred = 0; int temp = audio_MIN (max, audio_MIN (left, csc_bytes)); int index = d - &s->chan[0]; @@ -807,7 +807,7 @@ static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, temp -= acquired; addr += acquired; - transfered += acquired; + transferred += acquired; } } else { @@ -823,11 +823,11 @@ static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, break; temp -= copied; addr += copied; - transfered += copied; + transferred += copied; } } - if (csc_bytes == transfered) { + if (csc_bytes == transferred) { *irq = 1; d->scount = sc | (sc << 16); ldebug ("sc = %d, rate = %f\n", @@ -836,10 +836,10 @@ static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, } else { *irq = 0; - d->scount = sc | (((csc_bytes - transfered - 1) >> d->shift) << 16); + d->scount = sc | (((csc_bytes - transferred - 1) >> d->shift) << 16); } - cnt += (transfered + d->leftover) >> 2; + cnt += (transferred + d->leftover) >> 2; if (s->sctl & loop_sel) { /* Bah, how stupid is that having a 0 represent true value? @@ -853,7 +853,7 @@ static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, d->frame_cnt |= cnt << 16; } - d->leftover = (transfered + d->leftover) & 3; + d->leftover = (transferred + d->leftover) & 3; } static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail) diff --git a/hw/etraxfs_dma.c b/hw/etraxfs_dma.c index 02d0183..d2bd584 100644 --- a/hw/etraxfs_dma.c +++ b/hw/etraxfs_dma.c @@ -180,7 +180,7 @@ struct fs_dma_channel struct dma_descr_context current_c; struct dma_descr_data current_d; - /* Controll registers. */ + /* Control registers. */ uint32_t regs[DMA_REG_MAX]; }; diff --git a/hw/etraxfs_pic.c b/hw/etraxfs_pic.c index 72cbdb8..993d6a8 100644 --- a/hw/etraxfs_pic.c +++ b/hw/etraxfs_pic.c @@ -53,7 +53,7 @@ static void pic_update(struct etrax_pic *fs) fs->regs[R_R_MASKED_VECT] = fs->regs[R_R_VECT] & fs->regs[R_RW_MASK]; - /* The ETRAX interrupt controller signals interrupts to teh core + /* The ETRAX interrupt controller signals interrupts to the core through an interrupt request wire and an irq vector bus. If multiple interrupts are simultaneously active it chooses vector 0x30 and lets the sw choose the priorities. */ @@ -2,7 +2,7 @@ * QEMU Floppy disk emulator (Intel 82078) * * Copyright (c) 2003, 2007 Jocelyn Mayer - * Copyright (c) 2008 Hervé Poussineau + * Copyright (c) 2008 HervĂ© Poussineau * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -362,8 +362,8 @@ INLINE UINT32 OPL_CALC_SLOT( OPL_SLOT *SLOT ) return SLOT->TLL+ENV_CURVE[SLOT->evc>>ENV_BITS]+(SLOT->ams ? ams : 0); } -/* set algorythm connection */ -static void set_algorythm( OPL_CH *CH) +/* set algorithm connection */ +static void set_algorithm( OPL_CH *CH) { INT32 *carrier = &outd[0]; CH->connect1 = CH->CON ? carrier : &feedback2; @@ -498,7 +498,7 @@ INLINE void OPL_CALC_CH( OPL_CH *CH ) } } -/* ---------- calcrate rythm block ---------- */ +/* ---------- calcrate rhythm block ---------- */ #define WHITE_NOISE_db 6.0 INLINE void OPL_CALC_RH( OPL_CH *CH ) { @@ -715,7 +715,7 @@ static void OPLCloseTable( void ) free(VIB_TABLE); } -/* CSM Key Controll */ +/* CSM Key Control */ INLINE void CSMKeyControll(OPL_CH *CH) { OPL_SLOT *slot1 = &CH->SLOT[SLOT1]; @@ -762,7 +762,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v) switch(r&0xe0) { - case 0x00: /* 00-1f:controll */ + case 0x00: /* 00-1f:control */ switch(r&0x1f) { case 0x01: @@ -826,7 +826,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v) LOG(LOG_WAR,("OPL:write unmapped KEYBOARD port\n")); } return; - case 0x07: /* DELTA-T controll : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */ + case 0x07: /* DELTA-T control : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */ if(OPL->type&OPL_TYPE_ADPCM) YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v); return; @@ -895,14 +895,14 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v) case 0xbd: /* amsep,vibdep,r,bd,sd,tom,tc,hh */ { - UINT8 rkey = OPL->rythm^v; + UINT8 rkey = OPL->rhythm^v; OPL->ams_table = &AMS_TABLE[v&0x80 ? AMS_ENT : 0]; OPL->vib_table = &VIB_TABLE[v&0x40 ? VIB_ENT : 0]; - OPL->rythm = v&0x3f; - if(OPL->rythm&0x20) + OPL->rhythm = v&0x3f; + if(OPL->rhythm&0x20) { #if 0 - usrintf_showmessage("OPL Rythm mode select"); + usrintf_showmessage("OPL Rhythm mode select"); #endif /* BD key on/off */ if(rkey&0x10) @@ -995,7 +995,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v) int feedback = (v>>1)&7; CH->FB = feedback ? (8+1) - feedback : 0; CH->CON = v&1; - set_algorythm(CH); + set_algorithm(CH); } return; case 0xe0: /* wave type */ @@ -1049,7 +1049,7 @@ void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) OPLSAMPLE *buf = buffer; UINT32 amsCnt = OPL->amsCnt; UINT32 vibCnt = OPL->vibCnt; - UINT8 rythm = OPL->rythm&0x20; + UINT8 rhythm = OPL->rhythm&0x20; OPL_CH *CH,*R_CH; if( (void *)OPL != cur_chip ){ @@ -1057,7 +1057,7 @@ void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) /* channel pointers */ S_CH = OPL->P_CH; E_CH = &S_CH[9]; - /* rythm slot */ + /* rhythm slot */ SLOT7_1 = &S_CH[7].SLOT[SLOT1]; SLOT7_2 = &S_CH[7].SLOT[SLOT2]; SLOT8_1 = &S_CH[8].SLOT[SLOT1]; @@ -1068,7 +1068,7 @@ void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) ams_table = OPL->ams_table; vib_table = OPL->vib_table; } - R_CH = rythm ? &S_CH[6] : E_CH; + R_CH = rhythm ? &S_CH[6] : E_CH; for( i=0; i < length ; i++ ) { /* channel A channel B channel C */ @@ -1080,7 +1080,7 @@ void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) for(CH=S_CH ; CH < R_CH ; CH++) OPL_CALC_CH(CH); /* Rythn part */ - if(rythm) + if(rhythm) OPL_CALC_RH(S_CH); /* limit check */ data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT ); @@ -1110,7 +1110,7 @@ void Y8950UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) OPLSAMPLE *buf = buffer; UINT32 amsCnt = OPL->amsCnt; UINT32 vibCnt = OPL->vibCnt; - UINT8 rythm = OPL->rythm&0x20; + UINT8 rhythm = OPL->rhythm&0x20; OPL_CH *CH,*R_CH; YM_DELTAT *DELTAT = OPL->deltat; @@ -1122,7 +1122,7 @@ void Y8950UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) /* channel pointers */ S_CH = OPL->P_CH; E_CH = &S_CH[9]; - /* rythm slot */ + /* rhythm slot */ SLOT7_1 = &S_CH[7].SLOT[SLOT1]; SLOT7_2 = &S_CH[7].SLOT[SLOT2]; SLOT8_1 = &S_CH[8].SLOT[SLOT1]; @@ -1133,7 +1133,7 @@ void Y8950UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) ams_table = OPL->ams_table; vib_table = OPL->vib_table; } - R_CH = rythm ? &S_CH[6] : E_CH; + R_CH = rhythm ? &S_CH[6] : E_CH; for( i=0; i < length ; i++ ) { /* channel A channel B channel C */ @@ -1148,7 +1148,7 @@ void Y8950UpdateOne(FM_OPL *OPL, INT16 *buffer, int length) for(CH=S_CH ; CH < R_CH ; CH++) OPL_CALC_CH(CH); /* Rythn part */ - if(rythm) + if(rhythm) OPL_CALC_RH(S_CH); /* limit check */ data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT ); @@ -1380,7 +1380,7 @@ int OPLTimerOver(FM_OPL *OPL,int c) else { /* Timer A */ OPL_STATUS_SET(OPL,0x40); - /* CSM mode key,TL controll */ + /* CSM mode key,TL control */ if( OPL->mode & 0x80 ) { /* CSM mode total level latch and auto key on */ int ch; @@ -110,8 +110,8 @@ typedef struct fm_opl_f { /* FM channel slots */ OPL_CH *P_CH; /* pointer of CH */ int max_ch; /* maximum channel */ - /* Rythm sention */ - UINT8 rythm; /* Rythm mode , key flag */ + /* Rhythm sention */ + UINT8 rhythm; /* Rhythm mode , key flag */ #if BUILD_Y8950 /* Delta-T ADPCM unit (Y8950) */ YM_DELTAT *deltat; /* DELTA-T ADPCM */ diff --git a/hw/gusemu.h b/hw/gusemu.h index 5093767..331bb6f 100644 --- a/hw/gusemu.h +++ b/hw/gusemu.h @@ -27,7 +27,7 @@ /* data types (need to be adjusted if neither a VC6 nor a C99 compatible compiler is used) */ -#if defined _WIN32 && defined _MSC_VER /* doesnt support other win32 compilers yet, do it yourself... */ +#if defined _WIN32 && defined _MSC_VER /* doesn't support other win32 compilers yet, do it yourself... */ typedef unsigned char GUSbyte; typedef unsigned short GUSword; typedef unsigned int GUSdword; @@ -83,7 +83,7 @@ void gus_dma_transferdata(GUSEmuState *state, char *dma_addr, unsigned int count /* it is possible to break down a single transfer into multiple ones, but take care that: */ /* -dma_count is actually count-1 */ /* -before and during a transfer, DREQ is set and TC cleared */ -/* -when calling gus_dma_transferdata(), TC is only set true for call transfering the last byte */ +/* -when calling gus_dma_transferdata(), TC is only set true for call transferring the last byte */ /* -after the last transfer, DREQ is cleared and TC is set */ /* ** GF1 mixer emulation functions: */ diff --git a/hw/gusemu_hal.c b/hw/gusemu_hal.c index c6f9537..6096690 100644 --- a/hw/gusemu_hal.c +++ b/hw/gusemu_hal.c @@ -502,7 +502,7 @@ void gus_dma_transferdata(GUSEmuState * state, char *dma_addr, unsigned int coun /* this function gets called by the callback function as soon as a DMA transfer is about to start * dma_addr is a translated address within accessible memory, not the physical one, * count is (real dma count register)+1 - * note that the amount of bytes transfered is fully determined by values in the DMA registers + * note that the amount of bytes transferred is fully determined by values in the DMA registers * do not forget to update DMA states after transferring the entire block: * DREQ cleared & TC asserted after the _whole_ transfer */ @@ -517,7 +517,7 @@ void gus_dma_transferdata(GUSEmuState * state, char *dma_addr, unsigned int coun int offset = (GUSregw(GUS42DMAStart) << 4) + (GUSregb(GUS50DMAHigh) & 0xf); if (state->gusdma >= 4) offset = (offset & 0xc0000) + (2 * (offset & 0x1fff0)); /* 16 bit address translation */ - destaddr = (char *) state->himemaddr + offset; /* wavetable RAM adress */ + destaddr = (char *) state->himemaddr + offset; /* wavetable RAM address */ } GUSregw(GUS42DMAStart) += (GUSword) (count >> 4); /* ToDo: add 16bit GUS page limit? */ diff --git a/hw/ide/core.c b/hw/ide/core.c index 93a1a68..49847bd 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -1000,7 +1000,7 @@ void ide_exec_cmd(IDEBus *bus, uint32_t val) printf("ide: CMD=%02x\n", val); #endif s = idebus_active_if(bus); - /* ignore commands to non existant slave */ + /* ignore commands to non existent slave */ if (s != bus->ifs && !s->bs) return; diff --git a/hw/ide/via.c b/hw/ide/via.c index 098f150..a57134c 100644 --- a/hw/ide/via.c +++ b/hw/ide/via.c @@ -172,7 +172,7 @@ static void vt82c686b_init_ports(PCIIDEState *d) { /* via ide func */ static int vt82c686b_ide_initfn(PCIDevice *dev) { - PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev);; + PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev); uint8_t *pci_conf = d->dev.config; pci_config_set_prog_interface(pci_conf, 0x8a); /* legacy ATA mode */ diff --git a/hw/jazz_led.c b/hw/jazz_led.c index 6fab334..f8a2182 100644 --- a/hw/jazz_led.c +++ b/hw/jazz_led.c @@ -1,7 +1,7 @@ /* * QEMU JAZZ LED emulator. * - * Copyright (c) 2007 Hervé Poussineau + * Copyright (c) 2007 HervĂ© Poussineau * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal diff --git a/hw/lan9118.c b/hw/lan9118.c index ee8b2ea..7e64c5d 100644 --- a/hw/lan9118.c +++ b/hw/lan9118.c @@ -697,7 +697,7 @@ static uint32_t do_phy_read(lan9118_state *s, int reg) return 0x0007; case 3: /* ID2 */ return 0xc0d1; - case 4: /* Auto-neg advertisment */ + case 4: /* Auto-neg advertisement */ return s->phy_advertise; case 5: /* Auto-neg Link Partner Ability */ return 0x0f71; @@ -731,7 +731,7 @@ static void do_phy_write(lan9118_state *s, int reg, uint32_t val) s->phy_status |= 0x0020; } break; - case 4: /* Auto-neg advertisment */ + case 4: /* Auto-neg advertisement */ s->phy_advertise = (val & 0x2d7f) | 0x80; break; /* TODO 17, 18, 27, 31 */ diff --git a/hw/lm4549.c b/hw/lm4549.c index 4d5b831..80b3ec4 100644 --- a/hw/lm4549.c +++ b/hw/lm4549.c @@ -4,7 +4,7 @@ * Copyright (c) 2011 * Written by Mathieu Sonet - www.elasticsheep.com * - * This code is licenced under the GPL. + * This code is licensed under the GPL. * * ***************************************************************** * diff --git a/hw/lm4549.h b/hw/lm4549.h index 70d0ac1..5948780 100644 --- a/hw/lm4549.h +++ b/hw/lm4549.h @@ -4,7 +4,7 @@ * Copyright (c) 2011 * Written by Mathieu Sonet - www.elasticsheep.com * - * This code is licenced under the GPL. + * This code is licensed under the GPL. * * ***************************************************************** */ diff --git a/hw/mips_malta.c b/hw/mips_malta.c index bb49749..e7dfbd6 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -911,6 +911,7 @@ void mips_malta_init (ram_addr_t ram_size, uint32_t *end = addr + bios_size; while (addr < end) { bswap32s(addr); + addr++; } } #endif @@ -1616,7 +1616,7 @@ static void omap_prcm_write(void *opaque, target_phys_addr_t addr, case 0x500: /* CM_CLKEN_PLL */ if (value & 0xffffff30) fprintf(stderr, "%s: write 0s in CM_CLKEN_PLL for " - "future compatiblity\n", __FUNCTION__); + "future compatibility\n", __FUNCTION__); if ((s->clken[9] ^ value) & 0xcc) { s->clken[9] &= ~0xcc; s->clken[9] |= value & 0xcc; @@ -1635,7 +1635,7 @@ static void omap_prcm_write(void *opaque, target_phys_addr_t addr, case 0x540: /* CM_CLKSEL1_PLL */ if (value & 0xfc4000d7) fprintf(stderr, "%s: write 0s in CM_CLKSEL1_PLL for " - "future compatiblity\n", __FUNCTION__); + "future compatibility\n", __FUNCTION__); if ((s->clksel[5] ^ value) & 0x003fff00) { s->clksel[5] = value & 0x03bfff28; omap_prcm_dpll_update(s); @@ -1647,7 +1647,7 @@ static void omap_prcm_write(void *opaque, target_phys_addr_t addr, case 0x544: /* CM_CLKSEL2_PLL */ if (value & ~3) fprintf(stderr, "%s: write 0s in CM_CLKSEL2_PLL[31:2] for " - "future compatiblity\n", __FUNCTION__); + "future compatibility\n", __FUNCTION__); if (s->clksel[6] != (value & 3)) { s->clksel[6] = value & 3; omap_prcm_dpll_update(s); @@ -983,7 +983,7 @@ void pc_memory_init(MemoryRegion *system_memory, linux_boot = (kernel_filename != NULL); /* Allocate RAM. We allocate it as a single memory region and use - * aliases to address portions of it, mostly for backwards compatiblity + * aliases to address portions of it, mostly for backwards compatibility * with older qemus that used qemu_ram_alloc(). */ ram = g_malloc(sizeof(*ram)); diff --git a/hw/pci-stub.c b/hw/pci-stub.c index 636171c..134c448 100644 --- a/hw/pci-stub.c +++ b/hw/pci-stub.c @@ -34,7 +34,7 @@ static void pci_error_message(Monitor *mon) monitor_printf(mon, "PCI devices not supported\n"); } -int do_pcie_aer_inejct_error(Monitor *mon, +int do_pcie_aer_inject_error(Monitor *mon, const QDict *qdict, QObject **ret_data) { pci_error_message(mon); diff --git a/hw/pcie_aer.c b/hw/pcie_aer.c index 62c06ea..3b6981c 100644 --- a/hw/pcie_aer.c +++ b/hw/pcie_aer.c @@ -826,7 +826,7 @@ typedef struct PCIEAERErrorName { } PCIEAERErrorName; /* - * AER error name -> value convertion table + * AER error name -> value conversion table * This naming scheme is same to linux aer-injection tool. */ static const struct PCIEAERErrorName pcie_aer_error_list[] = { @@ -951,7 +951,7 @@ static int pcie_aer_parse_error_string(const char *error_name, return -EINVAL; } -int do_pcie_aer_inejct_error(Monitor *mon, +int do_pcie_aer_inject_error(Monitor *mon, const QDict *qdict, QObject **ret_data) { const char *id = qdict_get_str(qdict, "id"); @@ -4,7 +4,7 @@ * Copyright (c) 2011 * Written by Mathieu Sonet - www.elasticsheep.com * - * This code is licenced under the GPL. + * This code is licensed under the GPL. * * ***************************************************************** * @@ -4,7 +4,7 @@ * Copyright (c) 2011 * Written by Mathieu Sonet - www.elasticsheep.com * - * This code is licenced under the GPL. + * This code is licensed under the GPL. * * ***************************************************************** */ diff --git a/hw/pl041.hx b/hw/pl041.hx index e972996..dd7188c 100644 --- a/hw/pl041.hx +++ b/hw/pl041.hx @@ -4,7 +4,7 @@ * Copyright (c) 2011 * Written by Mathieu Sonet - www.elasticsheep.com * - * This code is licenced under the GPL. + * This code is licensed under the GPL. * * ***************************************************************** */ @@ -358,7 +358,7 @@ static void pl110_write(void *opaque, target_phys_addr_t offset, int n; /* For simplicity invalidate the display whenever a control register - is writen to. */ + is written to. */ s->invalidate = 1; if (offset >= 0x200 && offset < 0x400) { /* Pallette. */ @@ -311,9 +311,9 @@ static uint64_t pl181_read(void *opaque, target_phys_addr_t offset, case 0x48: /* FifoCnt */ /* The documentation is somewhat vague about exactly what FifoCnt does. On real hardware it appears to be when decrememnted - when a word is transfered between the FIFO and the serial + when a word is transferred between the FIFO and the serial data engine. DataCnt is decremented after each byte is - transfered between the serial engine and the card. + transferred between the serial engine and the card. We don't emulate this level of detail, so both can be the same. */ tmp = (s->datacnt + 3) >> 2; if (s->linux_hack) { @@ -1153,7 +1153,7 @@ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val) /* NVRAM helpers */ static inline uint32_t nvram_read (nvram_t *nvram, uint32_t addr) { - return (*nvram->read_fn)(nvram->opaque, addr);; + return (*nvram->read_fn)(nvram->opaque, addr); } static inline void nvram_write (nvram_t *nvram, uint32_t addr, uint32_t val) diff --git a/hw/rtl8139.c b/hw/rtl8139.c index bab6e61..0ae9f57 100644 --- a/hw/rtl8139.c +++ b/hw/rtl8139.c @@ -2662,7 +2662,7 @@ static void rtl8139_IntrStatus_write(RTL8139State *s, uint32_t val) * Computing if we miss an interrupt here is not that correct but * considered that we should have had already an interrupt * and probably emulated is slower is better to assume this resetting was - * done before testing on previous rtl8139_update_irq lead to IRQ loosing + * done before testing on previous rtl8139_update_irq lead to IRQ losing */ rtl8139_set_next_tctr_time(s, qemu_get_clock_ns(vm_clock)); rtl8139_update_irq(s); diff --git a/hw/sh7750_regs.h b/hw/sh7750_regs.h index 6ec13ab..534aa48 100644 --- a/hw/sh7750_regs.h +++ b/hw/sh7750_regs.h @@ -157,7 +157,7 @@ * Exeption-related registers */ -/* Immediate data for TRAPA instuction - TRA */ +/* Immediate data for TRAPA instruction - TRA */ #define SH7750_TRA_REGOFS 0x000020 /* offset */ #define SH7750_TRA SH7750_P4_REG32(SH7750_TRA_REGOFS) #define SH7750_TRA_A7 SH7750_A7_REG32(SH7750_TRA_REGOFS) diff --git a/hw/smc91c111.c b/hw/smc91c111.c index 9a3eddf..82b8811 100644 --- a/hw/smc91c111.c +++ b/hw/smc91c111.c @@ -429,7 +429,7 @@ static void smc91c111_writeb(void *opaque, target_phys_addr_t offset, smc91c111_update(s); return; } - break;; + break; case 3: switch (offset) { @@ -141,7 +141,7 @@ typedef struct sPAPREnvironment { #define H_DABRX_KERNEL (1ULL<<(63-62)) #define H_DABRX_USER (1ULL<<(63-63)) -/* Each control block has to be on a 4K bondary */ +/* Each control block has to be on a 4K boundary */ #define H_CB_ALIGNMENT 4096 /* pSeries hypervisor opcodes */ diff --git a/hw/ssd0303.c b/hw/ssd0303.c index 401fdf5..bcad7bf 100644 --- a/hw/ssd0303.c +++ b/hw/ssd0303.c @@ -123,7 +123,7 @@ static int ssd0303_send(i2c_slave *i2c, uint8_t data) case 0xa7: /* Inverse on. */ s->inverse = 1; break; - case 0xa8: /* Set multipled ratio (Ignored). */ + case 0xa8: /* Set multiplied ratio (Ignored). */ s->cmd_state = SSD0303_CMD_SKIP1; break; case 0xad: /* DC-DC power control. */ diff --git a/hw/tc6393xb_template.h b/hw/tc6393xb_template.h index 1ccf6e8..4cbbad5 100644 --- a/hw/tc6393xb_template.h +++ b/hw/tc6393xb_template.h @@ -5,7 +5,7 @@ * * FB support code. Based on G364 fb emulator * - * Copyright (c) 2007 Hervé Poussineau + * Copyright (c) 2007 HervĂ© Poussineau * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c index c665f5c..77b75bc 100644 --- a/hw/virtio-pci.c +++ b/hw/virtio-pci.c @@ -627,9 +627,10 @@ void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev) if (proxy->class_code) { pci_config_set_class(config, proxy->class_code); } - pci_set_word(config + 0x2c, pci_get_word(config + PCI_VENDOR_ID)); - pci_set_word(config + 0x2e, vdev->device_id); - config[0x3d] = 1; + pci_set_word(config + PCI_SUBSYSTEM_VENDOR_ID, + pci_get_word(config + PCI_VENDOR_ID)); + pci_set_word(config + PCI_SUBSYSTEM_ID, vdev->device_id); + config[PCI_INTERRUPT_PIN] = 1; memory_region_init(&proxy->msix_bar, "virtio-msix", 4096); if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, diff --git a/hw/vmport.c b/hw/vmport.c index b5c6fa1..0a3dbc5 100644 --- a/hw/vmport.c +++ b/hw/vmport.c @@ -1,7 +1,7 @@ /* * QEMU VMPort emulation * - * Copyright (C) 2007 Hervé Poussineau + * Copyright (C) 2007 HervĂ© Poussineau * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal diff --git a/hw/wdt_ib700.c b/hw/wdt_ib700.c index 81f22d0..ba1d92d 100644 --- a/hw/wdt_ib700.c +++ b/hw/wdt_ib700.c @@ -42,7 +42,7 @@ typedef struct IB700state { /* This is the timer. We use a global here because the watchdog * code ensures there is only one watchdog (it is located at a fixed, - * unchangable IO port, so there could only ever be one anyway). + * unchangeable IO port, so there could only ever be one anyway). */ /* A write to this register enables the timer. */ |
