diff options
author | Hervé Poussineau <hpoussin@reactos.org> | 2012-07-09 12:02:29 +0200 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2012-07-14 10:12:41 +0000 |
commit | 3af4e9aa5615a0511ddbe301b14d30a63ac8492b (patch) | |
tree | 5b98fd8dab83ab5d6c823d0303976b5e20c15ade /hw | |
parent | a391fdbc7fdd573a5eb132a940ab14e42e3bc5b0 (diff) | |
download | hqemu-3af4e9aa5615a0511ddbe301b14d30a63ac8492b.zip hqemu-3af4e9aa5615a0511ddbe301b14d30a63ac8492b.tar.gz |
esp: use trace framework instead of stderr output
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/esp.c | 13 |
1 files changed, 6 insertions, 7 deletions
@@ -26,6 +26,7 @@ #include "scsi.h" #include "esp.h" #include "trace.h" +#include "qemu-log.h" /* * On Sparc32, this is the ESP (NCR53C90) part of chip STP2000 (Master I/O), @@ -35,9 +36,6 @@ * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt */ -#define ESP_ERROR(fmt, ...) \ - do { printf("ESP ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0) - #define ESP_REGS 16 #define TI_BUFSZ 16 @@ -503,7 +501,8 @@ static uint64_t esp_reg_read(ESPState *s, uint32_t saddr) s->ti_size--; if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) { /* Data out. */ - ESP_ERROR("PIO data read not implemented\n"); + qemu_log_mask(LOG_UNIMP, + "esp: PIO data read not implemented\n"); s->rregs[ESP_FIFO] = 0; } else { s->rregs[ESP_FIFO] = s->ti_buf[s->ti_rptr++]; @@ -543,7 +542,7 @@ static void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val) if (s->do_cmd) { s->cmdbuf[s->cmdlen++] = val & 0xff; } else if (s->ti_size == TI_BUFSZ - 1) { - ESP_ERROR("fifo overrun\n"); + trace_esp_error_fifo_overrun(); } else { s->ti_size++; s->ti_buf[s->ti_wptr++] = val & 0xff; @@ -631,7 +630,7 @@ static void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val) esp_raise_irq(s); break; default: - ESP_ERROR("Unhandled ESP command (%2.2x)\n", (unsigned)val); + trace_esp_error_unhandled_command(val); break; } break; @@ -646,7 +645,7 @@ static void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val) s->rregs[saddr] = val; break; default: - ESP_ERROR("invalid write of 0x%02x at [0x%x]\n", (unsigned)val, saddr); + trace_esp_error_invalid_write(val, saddr); return; } s->wregs[saddr] = val; |