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author | Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> | 2012-08-03 16:08:48 +1000 |
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committer | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2012-10-10 11:13:32 +1000 |
commit | 559d489f137a696920d89ad2e3225b869c52b745 (patch) | |
tree | 6c8a3c23c91ef584412fd15d2d90c317a73370a6 /hw/xilinx_zynq.c | |
parent | 94befa454d430655fc863a7a855302b80f7a4812 (diff) | |
download | hqemu-559d489f137a696920d89ad2e3225b869c52b745.zip hqemu-559d489f137a696920d89ad2e3225b869c52b745.tar.gz |
xilinx_zynq: Added SPI controllers + flashes
Added the two SPI controllers to the zynq machine model. Attached two SPI flash
devices to each controller.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/xilinx_zynq.c')
-rw-r--r-- | hw/xilinx_zynq.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c index 7e6c273..fd46ba2 100644 --- a/hw/xilinx_zynq.c +++ b/hw/xilinx_zynq.c @@ -24,6 +24,9 @@ #include "flash.h" #include "blockdev.h" #include "loader.h" +#include "ssi.h" + +#define NUM_SPI_FLASHES 4 #define FLASH_SIZE (64 * 1024 * 1024) #define FLASH_SECTOR_SIZE (128 * 1024) @@ -46,6 +49,34 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq) sysbus_connect_irq(s, 0, irq); } +static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq) +{ + DeviceState *dev; + SysBusDevice *busdev; + SSIBus *spi; + int i; + + dev = qdev_create(NULL, "xilinx,spips"); + qdev_init_nofail(dev); + busdev = sysbus_from_qdev(dev); + sysbus_mmio_map(busdev, 0, base_addr); + sysbus_connect_irq(busdev, 0, irq); + + spi = (SSIBus *)qdev_get_child_bus(dev, "spi"); + + for (i = 0; i < NUM_SPI_FLASHES; ++i) { + qemu_irq cs_line; + + dev = ssi_create_slave_no_init(spi, "m25p80"); + qdev_prop_set_string(dev, "partname", "n25q128"); + qdev_init_nofail(dev); + + cs_line = qdev_get_gpio_in(dev, 0); + sysbus_connect_irq(busdev, i+1, cs_line); + } + +} + static void zynq_init(ram_addr_t ram_size, const char *boot_device, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model) @@ -113,6 +144,9 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device, pic[n] = qdev_get_gpio_in(dev, n); } + zynq_init_spi_flashes(0xE0006000, pic[58-IRQ_OFFSET]); + zynq_init_spi_flashes(0xE0007000, pic[81-IRQ_OFFSET]); + sysbus_create_simple("cadence_uart", 0xE0000000, pic[59-IRQ_OFFSET]); sysbus_create_simple("cadence_uart", 0xE0001000, pic[82-IRQ_OFFSET]); |