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| author | Andrzej Zaborowski <balrog@zabor.org> | 2011-03-10 03:11:47 +0100 |
|---|---|---|
| committer | Andrzej Zaborowski <balrog@zabor.org> | 2011-03-10 03:11:47 +0100 |
| commit | 7c29d6ce0fe1486688ada09b7da22eea05e90014 (patch) | |
| tree | 5ad0fa75e5bec442a2684512a3953389f40d420f /hw/pxa2xx_pic.c | |
| parent | 4ff927cc62ea79092e21827f17d19a3d85973e84 (diff) | |
| download | hqemu-7c29d6ce0fe1486688ada09b7da22eea05e90014.zip hqemu-7c29d6ce0fe1486688ada09b7da22eea05e90014.tar.gz | |
pxa2xx_pic: fixup initialisation
This is based on Dmitry Eremin-Solenikov's patch but simplified.
Diffstat (limited to 'hw/pxa2xx_pic.c')
| -rw-r--r-- | hw/pxa2xx_pic.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c index 86c0ee6..e9a5361 100644 --- a/hw/pxa2xx_pic.c +++ b/hw/pxa2xx_pic.c @@ -268,12 +268,11 @@ DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env) qdev_init_gpio_in(dev, pxa2xx_pic_set_irq, PXA2XX_PIC_SRCS); - sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); - /* Enable IC memory-mapped registers access. */ iomemtype = cpu_register_io_memory(pxa2xx_pic_readfn, pxa2xx_pic_writefn, s, DEVICE_NATIVE_ENDIAN); sysbus_init_mmio(sysbus_from_qdev(dev), 0x00100000, iomemtype); + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); /* Enable IC coprocessor access. */ cpu_arm_set_cp_io(env, 6, pxa2xx_pic_cp_read, pxa2xx_pic_cp_write, s); |
