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| author | Vasily Khoruzhick <anarsoul@gmail.com> | 2012-01-24 22:32:30 +0300 |
|---|---|---|
| committer | Andrzej Zaborowski <balrogg@gmail.com> | 2012-02-17 08:25:43 +0100 |
| commit | 4f56da61b907ef33fedeed78cf9299f6219c45e2 (patch) | |
| tree | 5a24d871749b88437ee1661272ff3f253e4c3b1d /hw/pxa2xx_lcd.c | |
| parent | 2d2624a001010548e3e170d812e0f116b78501aa (diff) | |
| download | hqemu-4f56da61b907ef33fedeed78cf9299f6219c45e2.zip hqemu-4f56da61b907ef33fedeed78cf9299f6219c45e2.tar.gz | |
pxa2xx_lcd: SRAM is valid location for the framebuffer
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
Diffstat (limited to 'hw/pxa2xx_lcd.c')
| -rw-r--r-- | hw/pxa2xx_lcd.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/hw/pxa2xx_lcd.c b/hw/pxa2xx_lcd.c index 4e9f7b4..9495226 100644 --- a/hw/pxa2xx_lcd.c +++ b/hw/pxa2xx_lcd.c @@ -308,9 +308,12 @@ static void pxa2xx_descriptor_load(PXA2xxLCDState *s) } else descptr = s->dma_ch[i].descriptor; - if (!(descptr >= PXA2XX_SDRAM_BASE && descptr + - sizeof(desc) <= PXA2XX_SDRAM_BASE + ram_size)) + if (!((descptr >= PXA2XX_SDRAM_BASE && descptr + + sizeof(desc) <= PXA2XX_SDRAM_BASE + ram_size) || + (descptr >= PXA2XX_INTERNAL_BASE && descptr + sizeof(desc) <= + PXA2XX_INTERNAL_BASE + PXA2XX_INTERNAL_SIZE))) { continue; + } cpu_physical_memory_read(descptr, (void *)&desc, sizeof(desc)); s->dma_ch[i].descriptor = tswap32(desc.fdaddr); @@ -830,8 +833,10 @@ static void pxa2xx_update_display(void *opaque) continue; } fbptr = s->dma_ch[ch].source; - if (!(fbptr >= PXA2XX_SDRAM_BASE && - fbptr <= PXA2XX_SDRAM_BASE + ram_size)) { + if (!((fbptr >= PXA2XX_SDRAM_BASE && + fbptr <= PXA2XX_SDRAM_BASE + ram_size) || + (fbptr >= PXA2XX_INTERNAL_BASE && + fbptr <= PXA2XX_INTERNAL_BASE + PXA2XX_INTERNAL_SIZE))) { pxa2xx_dma_ber_set(s, ch); continue; } |
