diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2011-11-09 20:46:35 +0000 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2011-11-11 12:49:53 -0600 |
| commit | afd4a65225318ec7900871ed69a46ce992637ef2 (patch) | |
| tree | 0a135bc7bd5afc63ca2c0cbce46ab87b38ae60d6 /hw/pxa2xx.c | |
| parent | b78c2b3aad2b42084265c89f93a92733d68e9003 (diff) | |
| download | hqemu-afd4a65225318ec7900871ed69a46ce992637ef2.zip hqemu-afd4a65225318ec7900871ed69a46ce992637ef2.tar.gz | |
hw/pxa2xx.c: Fix handling of R/WC bits in PMCR
Fix a bug in handling the write-one-to-clear bits in the PMCR
which meant that we would always clear the bit even if the
value written was a zero. Spotted by Coverity (see bug 887883).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/pxa2xx.c')
| -rw-r--r-- | hw/pxa2xx.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index bfc28a9..d38b922 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -114,7 +114,9 @@ static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr, switch (addr) { case PMCR: - s->pm_regs[addr >> 2] &= 0x15 & ~(value & 0x2a); + /* Clear the write-one-to-clear bits... */ + s->pm_regs[addr >> 2] &= ~(value & 0x2a); + /* ...and set the plain r/w bits */ s->pm_regs[addr >> 2] |= value & 0x15; break; |
