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authorHervé Poussineau <hpoussin@reactos.org>2012-04-14 22:48:37 +0200
committerAndreas Färber <andreas.faerber@web.de>2012-04-30 17:15:59 +0200
commit6c84ce0dc762999591bbef9e76e45cb260fe84e2 (patch)
tree05c8042dd94ce7ce9d092770b5dade620d9935cb /hw/prep_pci.c
parent9357b1449a6daa6fd79e2375f0aa8b1f60635bcb (diff)
downloadhqemu-6c84ce0dc762999591bbef9e76e45cb260fe84e2.zip
hqemu-6c84ce0dc762999591bbef9e76e45cb260fe84e2.tar.gz
prep: Move int-ack register from PReP to Raven PCI emulation
Register is one byte-wide (as per specification), so there is no need to specify endianness. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> [AF: Limit access validity to size 1] Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Diffstat (limited to 'hw/prep_pci.c')
-rw-r--r--hw/prep_pci.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index 8b29da9..38dbff44 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -25,10 +25,12 @@
#include "hw.h"
#include "pci.h"
#include "pci_host.h"
+#include "pc.h"
#include "exec-memory.h"
typedef struct PRePPCIState {
PCIHostState host_state;
+ MemoryRegion intack;
qemu_irq irq[4];
} PREPPCIState;
@@ -67,6 +69,19 @@ static const MemoryRegionOps PPC_PCIIO_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
+static uint64_t ppc_intack_read(void *opaque, target_phys_addr_t addr,
+ unsigned int size)
+{
+ return pic_read_irq(isa_pic);
+}
+
+static const MemoryRegionOps PPC_intack_ops = {
+ .read = ppc_intack_read,
+ .valid = {
+ .max_access_size = 1,
+ },
+};
+
static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
{
return (irq_num + (pci_dev->devfn >> 3)) & 1;
@@ -110,6 +125,8 @@ static int raven_pcihost_init(SysBusDevice *dev)
memory_region_init_io(&h->mmcfg, &PPC_PCIIO_ops, s, "pciio", 0x00400000);
memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg);
+ memory_region_init_io(&s->intack, &PPC_intack_ops, s, "pci-intack", 1);
+ memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->intack);
pci_create_simple(bus, 0, "raven");
return 0;
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