diff options
author | Alexander Graf <agraf@suse.de> | 2012-12-08 05:17:14 +0100 |
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committer | Alexander Graf <agraf@suse.de> | 2012-12-14 13:12:56 +0100 |
commit | d0b7263134dfd4d487698b639f2069951f3fdb26 (patch) | |
tree | ae51714095238103ce68da45913c9da7346fa709 /hw/ppc/e500.c | |
parent | 5bac0701113f4de4fee053a3939b0f569a04b88c (diff) | |
download | hqemu-d0b7263134dfd4d487698b639f2069951f3fdb26.zip hqemu-d0b7263134dfd4d487698b639f2069951f3fdb26.tar.gz |
openpic: convert to qdev
This patch converts the OpenPIC device to qdev. Along the way it
renames the "openpic" target to "raven" and the "mpic" target to
"fsl_mpic_20", to better reflect the actual models they implement.
This way we have a generic OpenPIC device now that can handle
different flavors of the OpenPIC specification.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/ppc/e500.c')
-rw-r--r-- | hw/ppc/e500.c | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 3f6d58c..fa9b8ed 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -418,7 +418,7 @@ void ppce500_init(PPCE500Params *params) target_ulong dt_base = 0; target_ulong initrd_base = 0; target_long initrd_size=0; - int i=0; + int i = 0, j, k; unsigned int pci_irq_nrs[4] = {1, 2, 3, 4}; qemu_irq **irqs, *mpic; DeviceState *dev; @@ -492,13 +492,27 @@ void ppce500_init(PPCE500Params *params) ccsr_addr_space); /* MPIC */ - mpic = mpic_init(ccsr_addr_space, MPC8544_MPIC_REGS_OFFSET, - smp_cpus, irqs); + mpic = g_new(qemu_irq, 256); + dev = qdev_create(NULL, "openpic"); + qdev_prop_set_uint32(dev, "nb_cpus", smp_cpus); + qdev_prop_set_uint32(dev, "model", OPENPIC_MODEL_FSL_MPIC_20); + qdev_init_nofail(dev); + s = sysbus_from_qdev(dev); + + k = 0; + for (i = 0; i < smp_cpus; i++) { + for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { + sysbus_connect_irq(s, k++, irqs[i][j]); + } + } - if (!mpic) { - cpu_abort(env, "MPIC failed to initialize\n"); + for (i = 0; i < 256; i++) { + mpic[i] = qdev_get_gpio_in(dev, i); } + memory_region_add_subregion(ccsr_addr_space, MPC8544_MPIC_REGS_OFFSET, + s->mmio[0].memory); + /* Serial */ if (serial_hds[0]) { serial_mm_init(ccsr_addr_space, MPC8544_SERIAL0_REGS_OFFSET, |