diff options
| author | Michael S. Tsirkin <mst@redhat.com> | 2009-12-10 16:51:04 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2009-12-23 16:35:00 +0200 |
| commit | 97526229dab93249a4b7308b6554247a2bf3aa5f (patch) | |
| tree | fd03f4547c5ae153d47ce510682c475aed536b16 /hw/pcnet.c | |
| parent | 0b5b3547cd4bf906fa7c9d2aabf09c4df17947a0 (diff) | |
| download | hqemu-97526229dab93249a4b7308b6554247a2bf3aa5f.zip hqemu-97526229dab93249a4b7308b6554247a2bf3aa5f.tar.gz | |
pcnet: switch to symbolic names for pci registers
No functional changes. I verified that the generated binary
does not change.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Juan Quintela <quintela@redhat.com>
Acked-by: Glauber Costa <glommer@gmail.com>
Diffstat (limited to 'hw/pcnet.c')
| -rw-r--r-- | hw/pcnet.c | 26 |
1 files changed, 17 insertions, 9 deletions
@@ -1981,24 +1981,32 @@ static int pci_pcnet_init(PCIDevice *pci_dev) pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_AMD); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_AMD_LANCE); - *(uint16_t *)&pci_conf[0x04] = cpu_to_le16(0x0007); - *(uint16_t *)&pci_conf[0x06] = cpu_to_le16(0x0280); - pci_conf[0x08] = 0x10; - pci_conf[0x09] = 0x00; + /* TODO: value should be 0 at RST# */ + pci_set_word(pci_conf + PCI_COMMAND, + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + pci_set_word(pci_conf + PCI_STATUS, + PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM); + pci_conf[PCI_REVISION_ID] = 0x10; + /* TODO: 0 is the default anyway, no need to set it. */ + pci_conf[PCI_CLASS_PROG] = 0x00; pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET); pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type - *(uint32_t *)&pci_conf[0x10] = cpu_to_le32(0x00000001); - *(uint32_t *)&pci_conf[0x14] = cpu_to_le32(0x00000000); + /* TODO: not necessary, is set when BAR is registered. */ + pci_set_long(pci_conf + PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_SPACE_IO); + pci_set_long(pci_conf + PCI_BASE_ADDRESS_0 + 4, + PCI_BASE_ADDRESS_SPACE_MEMORY); - pci_conf[0x3d] = 1; // interrupt pin 0 - pci_conf[0x3e] = 0x06; - pci_conf[0x3f] = 0xff; + /* TODO: value must be 0 at RST# */ + pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0 + pci_conf[PCI_MIN_GNT] = 0x06; + pci_conf[PCI_MAX_LAT] = 0xff; /* Handler for memory-mapped I/O */ s->mmio_index = cpu_register_io_memory(pcnet_mmio_read, pcnet_mmio_write, &d->state); + /* TODO: use pci_dev, avoid cast below. */ pci_register_bar((PCIDevice *)d, 0, PCNET_IOPORT_SIZE, PCI_BASE_ADDRESS_SPACE_IO, pcnet_ioport_map); |
