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authorIsaku Yamahata <yamahata@valinux.co.jp>2009-11-12 14:58:47 +0900
committerMichael S. Tsirkin <mst@redhat.com>2009-12-01 17:52:47 +0200
commitd46636b88339ecc2cb8d10113f45ada164817773 (patch)
treeadda46d366348cb339668afede607a1022f4a4d5 /hw/pci.h
parent10c9c329da60fe64ad24dba6f81044559ff15f9b (diff)
downloadhqemu-d46636b88339ecc2cb8d10113f45ada164817773.zip
hqemu-d46636b88339ecc2cb8d10113f45ada164817773.tar.gz
pci: pci bridge related clean up.
- fix bridge prefetchable memory accesser to check 64bit or not. - use pcibus_t consistently instead mixing pcibus_t and uint64_t. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pci.h')
-rw-r--r--hw/pci.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/pci.h b/hw/pci.h
index 6a868f9..0baf69b 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -131,6 +131,7 @@ typedef struct PCIIORegion {
#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */
#define PCI_PREF_MEMORY_LIMIT 0x26
#define PCI_PREF_RANGE_MASK (~0x0fUL)
+#define PCI_PREF_RANGE_TYPE_64 0x01
#define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */
#define PCI_PREF_LIMIT_UPPER32 0x2c
#define PCI_SUBSYSTEM_VENDOR_ID 0x2c /* 16 bits */
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