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authorMichael S. Tsirkin <mst@redhat.com>2009-11-25 16:31:42 +0200
committerMichael S. Tsirkin <mst@redhat.com>2009-12-07 21:50:53 +0200
commitb6981cb57be5d66b1b7cf9009a122fb3cdd4b96b (patch)
treeab6baa03077255ac9138ec1909f701108496d85e /hw/pci.h
parentf9bf77dd1f838b0061172fe41709b221956da2f5 (diff)
downloadhqemu-b6981cb57be5d66b1b7cf9009a122fb3cdd4b96b.zip
hqemu-b6981cb57be5d66b1b7cf9009a122fb3cdd4b96b.tar.gz
pci: interrupt disable bit support
Interrupt disable bit is mandatory in PCI spec. Implement it to make devices spec compliant. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Isaku Yamahata <yamahata@valinux.co.jp>
Diffstat (limited to 'hw/pci.h')
-rw-r--r--hw/pci.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/pci.h b/hw/pci.h
index dc9b860..d279e3f 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -101,6 +101,7 @@ typedef struct PCIIORegion {
#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
#define PCI_COMMAND_MASTER 0x4 /* Enable bus master */
+#define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */
#define PCI_STATUS 0x06 /* 16 bits */
#define PCI_STATUS_INTERRUPT 0x08
#define PCI_REVISION_ID 0x08 /* 8 bits */
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