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author | Andreas Färber <afaerber@suse.de> | 2013-01-18 15:03:43 +0100 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:55 +0100 |
commit | c3affe5670e5d0df8a7e06f1d6e80853633146df (patch) | |
tree | bc2a6d0877cf7aea8821053cf6c8df10f167caa5 /hw/openrisc/pic_cpu.c | |
parent | d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (diff) | |
download | hqemu-c3affe5670e5d0df8a7e06f1d6e80853633146df.zip hqemu-c3affe5670e5d0df8a7e06f1d6e80853633146df.tar.gz |
cpu: Pass CPUState to cpu_interrupt()
Move it to qom/cpu.h to avoid issues with include order.
Change pc_acpi_smi_interrupt() opaque to X86CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/openrisc/pic_cpu.c')
-rw-r--r-- | hw/openrisc/pic_cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/openrisc/pic_cpu.c b/hw/openrisc/pic_cpu.c index 7e4f9e0..ca0b7c1 100644 --- a/hw/openrisc/pic_cpu.c +++ b/hw/openrisc/pic_cpu.c @@ -41,7 +41,7 @@ static void openrisc_pic_cpu_handler(void *opaque, int irq, int level) for (i = 0; i < 32; i++) { if ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i))) { - cpu_interrupt(&cpu->env, CPU_INTERRUPT_HARD); + cpu_interrupt(cs, CPU_INTERRUPT_HARD); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); cpu->env.picsr &= ~(1 << i); |