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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-04 12:19:22 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-04 12:19:22 +0000
commitcf965d24064671ce2d5a874e532b8189fdb6e863 (patch)
tree5e6f1592b093c18778815beaf000b88041524a74 /hw/omap.h
parent51a652717490eaa2d1d03cfa940126ac538f6bdc (diff)
downloadhqemu-cf965d24064671ce2d5a874e532b8189fdb6e863.zip
hqemu-cf965d24064671ce2d5a874e532b8189fdb6e863.tar.gz
Add register mappings in DSP space (must be accessible for MPU too).
Don't set microwire CSR-busy bit too early. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3530 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap.h')
-rw-r--r--hw/omap.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/omap.h b/hw/omap.h
index bceb458..dbfc6dd 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -546,7 +546,6 @@ struct omap_mpu_state_s {
struct omap_uwire_s *microwire;
struct {
- target_phys_addr_t base;
uint8_t output;
uint8_t level;
uint8_t enable;
@@ -554,7 +553,6 @@ struct omap_mpu_state_s {
} pwl;
struct {
- target_phys_addr_t base;
uint8_t frc;
uint8_t vrc;
uint8_t gcr;
@@ -665,4 +663,6 @@ void omap_badwidth_write32(void *opaque, target_phys_addr_t addr,
# define OMAP_32B_REG(paddr)
# endif
+# define OMAP_MPUI_REG_MASK 0x000007ff
+
#endif /* hw_omap_h */
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