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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-17 15:26:47 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-17 15:26:47 +0000 |
| commit | fcb4a419f52e538b68510a68f30d8834dd211155 (patch) | |
| tree | dde98a86a29d51b875dba98d448e1ae18c0f691d /hw/mips_timer.c | |
| parent | 04f20795ac815cf3ad5d1fdc99462f60eb871f25 (diff) | |
| download | hqemu-fcb4a419f52e538b68510a68f30d8834dd211155.zip hqemu-fcb4a419f52e538b68510a68f30d8834dd211155.tar.gz | |
Choose number of TLBs at runtime, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mips_timer.c')
| -rw-r--r-- | hw/mips_timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/mips_timer.c b/hw/mips_timer.c index bd89e5d..6a517e1 100644 --- a/hw/mips_timer.c +++ b/hw/mips_timer.c @@ -10,7 +10,7 @@ uint32_t cpu_mips_get_random (CPUState *env) static uint32_t seed = 0; uint32_t idx; seed = seed * 314159 + 1; - idx = (seed >> 16) % (MIPS_TLB_NB - env->CP0_Wired) + env->CP0_Wired; + idx = (seed >> 16) % (env->nb_tlb - env->CP0_Wired) + env->CP0_Wired; return idx; } |
