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| author | Alexander Graf <agraf@suse.de> | 2010-12-08 12:05:49 +0100 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2010-12-11 15:24:26 +0000 |
| commit | 968d683c042d80821a00a76608ae770a7401cac0 (patch) | |
| tree | 90528f9386c5712a6a6c15de6b2a3eff5852a5f6 /hw/mips_mipssim.c | |
| parent | b093c1a3277d4ce531a1a36f85dd542c60db3809 (diff) | |
| download | hqemu-968d683c042d80821a00a76608ae770a7401cac0.zip hqemu-968d683c042d80821a00a76608ae770a7401cac0.tar.gz | |
isa_mmio: Always use little endian
This patch converts the ISA MMIO bridge code to always use little endian mmio.
All bswap code that existed was only there to convert from native cpu
endianness to little endian ISA devices.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/mips_mipssim.c')
| -rw-r--r-- | hw/mips_mipssim.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c index 111c759..380a7eb 100644 --- a/hw/mips_mipssim.c +++ b/hw/mips_mipssim.c @@ -186,11 +186,7 @@ mips_mipssim_init (ram_addr_t ram_size, cpu_mips_clock_init(env); /* Register 64 KB of ISA IO space at 0x1fd00000. */ -#ifdef TARGET_WORDS_BIGENDIAN - isa_mmio_init(0x1fd00000, 0x00010000, 1); -#else - isa_mmio_init(0x1fd00000, 0x00010000, 0); -#endif + isa_mmio_init(0x1fd00000, 0x00010000); /* A single 16450 sits at offset 0x3f8. It is attached to MIPS CPU INT2, which is interrupt 4. */ |
