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| author | Blue Swirl <blauwirbel@gmail.com> | 2010-03-21 19:47:09 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2010-03-21 19:47:09 +0000 |
| commit | 84108e128e0245dc1ff9c0aa064e9cfe2316b32d (patch) | |
| tree | 7676ed17e01f89aaf2896e4514198ccd5a3b71ef /hw/mips_mipssim.c | |
| parent | 7161e5710b8b371d88b8c6b9361d266d8bdd70ce (diff) | |
| download | hqemu-84108e128e0245dc1ff9c0aa064e9cfe2316b32d.zip hqemu-84108e128e0245dc1ff9c0aa064e9cfe2316b32d.tar.gz | |
Compile isa_mmio only once
Push TARGET_WORDS_BIGENDIAN dependency to board level.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/mips_mipssim.c')
| -rw-r--r-- | hw/mips_mipssim.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c index 9a6f50c..98d1a01 100644 --- a/hw/mips_mipssim.c +++ b/hw/mips_mipssim.c @@ -182,7 +182,11 @@ mips_mipssim_init (ram_addr_t ram_size, cpu_mips_clock_init(env); /* Register 64 KB of ISA IO space at 0x1fd00000. */ - isa_mmio_init(0x1fd00000, 0x00010000); +#ifdef TARGET_WORDS_BIGENDIAN + isa_mmio_init(0x1fd00000, 0x00010000, 1); +#else + isa_mmio_init(0x1fd00000, 0x00010000, 0); +#endif /* A single 16450 sits at offset 0x3f8. It is attached to MIPS CPU INT2, which is interrupt 4. */ |
