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author | Peter Maydell <peter.maydell@linaro.org> | 2015-11-19 15:56:50 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2015-11-19 15:56:51 +0000 |
commit | c601a244a49f4e0be2539cbc5ffd288727cd4e89 (patch) | |
tree | 8472c9eb3168ada1a5e408585845be0327b22771 /hw/isa | |
parent | 80fda8f609457736ab43f0cb8027abb0e28a67f8 (diff) | |
parent | ce8a1b5449cd8c4c2831abb581d3208c3a3745a0 (diff) | |
download | hqemu-c601a244a49f4e0be2539cbc5ffd288727cd4e89.zip hqemu-c601a244a49f4e0be2539cbc5ffd288727cd4e89.tar.gz |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151119' into staging
target-arm queue:
* add missing condexec updates when emulating architectural breakpoints
and coprocessor access checks in Thumb translation (could in theory
cause problems when these happened inside a Thumb IT block and an
exception was taken)
* arm_gic: correctly restore nested IRQ priority
# gpg: Signature made Thu 19 Nov 2015 13:29:37 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-20151119:
target-arm: Update condexec before arch BP check in AA32 translation
target-arm: Update condexec before CP access check in AA32 translation
hw/arm_gic: Correctly restore nested irq priority
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/isa')
0 files changed, 0 insertions, 0 deletions