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| author | Isaku Yamahata <yamahata@valinux.co.jp> | 2010-10-20 17:18:53 +0900 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2010-10-20 12:06:43 +0200 |
| commit | 8135aeed0f0b370a7978d06a49de20f50181e7b9 (patch) | |
| tree | d2091cb05e23a4bc282025884a7043058af679fc /hw/ioh3420.h | |
| parent | bc20ba98b1a04c9e60de10f2a5626af2c528422b (diff) | |
| download | hqemu-8135aeed0f0b370a7978d06a49de20f50181e7b9.zip hqemu-8135aeed0f0b370a7978d06a49de20f50181e7b9.tar.gz | |
ioh3420: pcie root port in X58 ioh
Implements pcie root port switch in intel X58 ioh
whose device id is 0x3420.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/ioh3420.h')
| -rw-r--r-- | hw/ioh3420.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/hw/ioh3420.h b/hw/ioh3420.h new file mode 100644 index 0000000..68c523a --- /dev/null +++ b/hw/ioh3420.h @@ -0,0 +1,10 @@ +#ifndef QEMU_IOH3420_H +#define QEMU_IOH3420_H + +#include "pcie_port.h" + +PCIESlot *ioh3420_init(PCIBus *bus, int devfn, bool multifunction, + const char *bus_name, pci_map_irq_fn map_irq, + uint8_t port, uint8_t chassis, uint16_t slot); + +#endif /* QEMU_IOH3420_H */ |
