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authorAnthony Liguori <aliguori@us.ibm.com>2011-12-07 21:34:16 -0600
committerAnthony Liguori <aliguori@us.ibm.com>2012-02-03 10:41:06 -0600
commit39bffca2030950ef6efe57c2fac8327a45ae1015 (patch)
tree325262f44978e6116c9e43f688c900e08ee83738 /hw/a9mpcore.c
parent212ad111683a5b5a79a74d6141a4b75f532a4c8f (diff)
downloadhqemu-39bffca2030950ef6efe57c2fac8327a45ae1015.zip
hqemu-39bffca2030950ef6efe57c2fac8327a45ae1015.tar.gz
qdev: register all types natively through QEMU Object Model
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/a9mpcore.c')
-rw-r--r--hw/a9mpcore.c40
1 files changed, 22 insertions, 18 deletions
diff --git a/hw/a9mpcore.c b/hw/a9mpcore.c
index b42c475..19de12b 100644
--- a/hw/a9mpcore.c
+++ b/hw/a9mpcore.c
@@ -208,35 +208,39 @@ static const VMStateDescription vmstate_a9mp_priv = {
}
};
+static Property a9mp_priv_properties[] = {
+ DEFINE_PROP_UINT32("num-cpu", a9mp_priv_state, num_cpu, 1),
+ /* The Cortex-A9MP may have anything from 0 to 224 external interrupt
+ * IRQ lines (with another 32 internal). We default to 64+32, which
+ * is the number provided by the Cortex-A9MP test chip in the
+ * Realview PBX-A9 and Versatile Express A9 development boards.
+ * Other boards may differ and should set this property appropriately.
+ */
+ DEFINE_PROP_UINT32("num-irq", a9mp_priv_state, num_irq, 96),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void a9mp_priv_class_init(ObjectClass *klass, void *data)
{
+ DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = a9mp_priv_init;
+ dc->props = a9mp_priv_properties;
+ dc->vmsd = &vmstate_a9mp_priv;
+ dc->reset = a9mp_priv_reset;
}
-static DeviceInfo a9mp_priv_info = {
- .name = "a9mpcore_priv",
- .size = sizeof(a9mp_priv_state),
- .vmsd = &vmstate_a9mp_priv,
- .reset = a9mp_priv_reset,
- .class_init = a9mp_priv_class_init,
- .props = (Property[]) {
- DEFINE_PROP_UINT32("num-cpu", a9mp_priv_state, num_cpu, 1),
- /* The Cortex-A9MP may have anything from 0 to 224 external interrupt
- * IRQ lines (with another 32 internal). We default to 64+32, which
- * is the number provided by the Cortex-A9MP test chip in the
- * Realview PBX-A9 and Versatile Express A9 development boards.
- * Other boards may differ and should set this property appropriately.
- */
- DEFINE_PROP_UINT32("num-irq", a9mp_priv_state, num_irq, 96),
- DEFINE_PROP_END_OF_LIST(),
- }
+static TypeInfo a9mp_priv_info = {
+ .name = "a9mpcore_priv",
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(a9mp_priv_state),
+ .class_init = a9mp_priv_class_init,
};
static void a9mp_register_devices(void)
{
- sysbus_register_withprop(&a9mp_priv_info);
+ type_register_static(&a9mp_priv_info);
}
device_init(a9mp_register_devices)
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