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authorPeter Maydell <peter.maydell@linaro.org>2012-04-13 11:39:07 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-04-13 11:39:07 +0000
commit386e29554e8f1a7e910682789418aed2094b4ef6 (patch)
tree4333899673bb7c4fd356729f265416984e667825 /hw/a15mpcore.c
parent5181b50fc89d321cf79ed2f2fff5bec0b55e3011 (diff)
downloadhqemu-386e29554e8f1a7e910682789418aed2094b4ef6.zip
hqemu-386e29554e8f1a7e910682789418aed2094b4ef6.tar.gz
hw/arm_gic: Move NCPU definition to arm_gic.c
Move the NCPU definition to arm_gic.c: the maximum number of CPU interfaces is defined by the GIC architecture specification to be 8, so we don't need to have this #define in each of the sources files which currently includes arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
Diffstat (limited to 'hw/a15mpcore.c')
-rw-r--r--hw/a15mpcore.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/hw/a15mpcore.c b/hw/a15mpcore.c
index 71142e5..67206ec 100644
--- a/hw/a15mpcore.c
+++ b/hw/a15mpcore.c
@@ -21,10 +21,8 @@
#include "sysbus.h"
/* Configuration for arm_gic.c:
- * max number of CPUs, how to ID current CPU
+ * how to ID current CPU
*/
-#define NCPU 4
-
static inline int gic_get_current_cpu(void)
{
return cpu_single_env->cpu_index;
@@ -45,10 +43,6 @@ static int a15mp_priv_init(SysBusDevice *dev)
{
A15MPPrivState *s = FROM_SYSBUSGIC(A15MPPrivState, dev);
- if (s->num_cpu > NCPU) {
- hw_error("a15mp_priv_init: num-cpu may not be more than %d\n", NCPU);
- }
-
gic_init(&s->gic, s->num_cpu, s->num_irq);
/* Memory map (addresses are offsets from PERIPHBASE):
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