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| author | Miodrag Dinic <miodrag.dinic@imgtec.com> | 2015-12-03 16:48:57 +0100 |
|---|---|---|
| committer | Timothy Pearson <tpearson@raptorengineering.com> | 2019-11-29 19:29:54 -0600 |
| commit | c711406b1c43ff822041019eea57440f4e6557db (patch) | |
| tree | 2a3f10da209a2320502a143f5f70fc90bb790544 /disas/mips.c | |
| parent | 553f5fcb445f9ef7b1ff96c4ce6174f81d6d72a1 (diff) | |
| download | hqemu-c711406b1c43ff822041019eea57440f4e6557db.zip hqemu-c711406b1c43ff822041019eea57440f4e6557db.tar.gz | |
target-mips: Fix ALIGN instruction when bp=0
If executing ALIGN with shift count bp=0 within mips64 emulation,
the result of the operation should be sign extended.
Taken from the official documentation (pseudo code) :
ALIGN:
tmp_rt_hi = unsigned_word(GPR[rt]) << (8*bp)
tmp_rs_lo = unsigned_word(GPR[rs]) >> (8*(4-bp))
tmp = tmp_rt_hi || tmp_rt_lo
GPR[rd] = sign_extend.32(tmp)
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'disas/mips.c')
0 files changed, 0 insertions, 0 deletions
