summaryrefslogtreecommitdiffstats
path: root/Makefile.target
diff options
context:
space:
mode:
authorAurelien Jarno <aurelien@aurel32.net>2010-04-09 20:52:48 +0200
committerAurelien Jarno <aurelien@aurel32.net>2010-04-19 07:03:06 +0200
commit914ccf51b07af860021863e0f8e46eac9ffbcb68 (patch)
treea879811d8bc42a82063741d8c1817347bd6d559a /Makefile.target
parentbf5675efe33888fe058210be98259a34faf4d4e5 (diff)
downloadhqemu-914ccf51b07af860021863e0f8e46eac9ffbcb68.zip
hqemu-914ccf51b07af860021863e0f8e46eac9ffbcb68.tar.gz
tcg/arm: optimize register allocation order
The beginning of the register allocation order list on the TCG arm target matches the list of clobbered registers. This means that when an helper is called, there is almost always clobbered registers that have to be spilled. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'Makefile.target')
0 files changed, 0 insertions, 0 deletions
OpenPOWER on IntegriCloud