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author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-30 10:24:13 +0000 |
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committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-11-30 10:24:13 +0000 |
commit | 4bf5801db44a1bb13e80b35bb0ea7aeed9780050 (patch) | |
tree | bc6dae4dedc0cfaeca824a100cb623fbc68b0c73 | |
parent | d4742de84fe0b5907a46b1a32b5646f1d64e001a (diff) | |
download | hqemu-4bf5801db44a1bb13e80b35bb0ea7aeed9780050.zip hqemu-4bf5801db44a1bb13e80b35bb0ea7aeed9780050.tar.gz |
Fix ICCS command (Herve Poussineau)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5818 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | hw/esp.c | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -517,6 +517,8 @@ static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) case CMD_ICCS: DPRINTF("Initiator Command Complete Sequence (%2.2x)\n", val); write_response(s); + s->rregs[ESP_RINTR] = INTR_FC; + s->rregs[ESP_RSTAT] |= STAT_MI; break; case CMD_MSGACC: DPRINTF("Message Accepted (%2.2x)\n", val); |