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| author | Richard Henderson <rth@twiddle.net> | 2013-06-07 07:26:20 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2013-11-30 07:45:14 +1300 |
| commit | 41d9ea80ac8455845494c889fe6ac447b39a7d64 (patch) | |
| tree | 3c8988e5a3d1bbfbf7fedb35269d958c3adb3ab1 | |
| parent | cd629de1cf013e9654c6f0b92b2329f04dfaf880 (diff) | |
| download | hqemu-41d9ea80ac8455845494c889fe6ac447b39a7d64.zip hqemu-41d9ea80ac8455845494c889fe6ac447b39a7d64.tar.gz | |
tcg-arm: Use qemu_getauxval
Allow host detection on linux systems without glibc 2.16 or later.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | include/elf.h | 25 | ||||
| -rw-r--r-- | tcg/arm/tcg-target.c | 14 |
2 files changed, 30 insertions, 9 deletions
diff --git a/include/elf.h b/include/elf.h index b68fc60..6610ca2 100644 --- a/include/elf.h +++ b/include/elf.h @@ -411,6 +411,31 @@ typedef struct { #define R_SPARC_5 44 #define R_SPARC_6 45 +/* Bits present in AT_HWCAP for ARM. */ + +#define HWCAP_ARM_SWP (1 << 0) +#define HWCAP_ARM_HALF (1 << 1) +#define HWCAP_ARM_THUMB (1 << 2) +#define HWCAP_ARM_26BIT (1 << 3) +#define HWCAP_ARM_FAST_MULT (1 << 4) +#define HWCAP_ARM_FPA (1 << 5) +#define HWCAP_ARM_VFP (1 << 6) +#define HWCAP_ARM_EDSP (1 << 7) +#define HWCAP_ARM_JAVA (1 << 8) +#define HWCAP_ARM_IWMMXT (1 << 9) +#define HWCAP_ARM_CRUNCH (1 << 10) +#define HWCAP_ARM_THUMBEE (1 << 11) +#define HWCAP_ARM_NEON (1 << 12) +#define HWCAP_ARM_VFPv3 (1 << 13) +#define HWCAP_ARM_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ +#define HWCAP_ARM_TLS (1 << 15) +#define HWCAP_ARM_VFPv4 (1 << 16) +#define HWCAP_ARM_IDIVA (1 << 17) +#define HWCAP_ARM_IDIVT (1 << 18) +#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) +#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs */ +#define HWCAP_LPAE (1 << 20) + /* Bits present in AT_HWCAP for PowerPC. */ #define PPC_FEATURE_32 0x80000000 diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index e93a4a2..82658a1 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ +#include "elf.h" #include "tcg-be-ldst.h" /* The __ARM_ARCH define is provided by gcc 4.8. Construct it otherwise. */ @@ -58,9 +59,6 @@ static int arm_arch = __ARM_ARCH; #ifndef use_idiv_instructions bool use_idiv_instructions; #endif -#ifdef CONFIG_GETAUXVAL -# include <sys/auxv.h> -#endif #ifndef NDEBUG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { @@ -2036,22 +2034,20 @@ static const TCGTargetOpDef arm_op_defs[] = { static void tcg_target_init(TCGContext *s) { -#if defined(CONFIG_GETAUXVAL) /* Only probe for the platform and capabilities if we havn't already determined maximum values at compile time. */ -# if !defined(use_idiv_instructions) +#ifndef use_idiv_instructions { - unsigned long hwcap = getauxval(AT_HWCAP); + unsigned long hwcap = qemu_getauxval(AT_HWCAP); use_idiv_instructions = (hwcap & HWCAP_ARM_IDIVA) != 0; } -# endif +#endif if (__ARM_ARCH < 7) { - const char *pl = (const char *)getauxval(AT_PLATFORM); + const char *pl = (const char *)qemu_getauxval(AT_PLATFORM); if (pl != NULL && pl[0] == 'v' && pl[1] >= '4' && pl[1] <= '9') { arm_arch = pl[1] - '0'; } } -#endif /* GETAUXVAL */ tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff); tcg_regset_set32(tcg_target_call_clobber_regs, 0, |
