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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-06 20:31:09 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-06 20:31:09 +0000 |
commit | 35f1de319299f043132702c36ebaadfc4a15db69 (patch) | |
tree | 888f06e168862a10a12571f86613c7368bfa8fb7 | |
parent | 451a42127ff27a499bed22e4eef1a5c452adc311 (diff) | |
download | hqemu-35f1de319299f043132702c36ebaadfc4a15db69.zip hqemu-35f1de319299f043132702c36ebaadfc4a15db69.tar.gz |
Fix GT-64xxx PCI mapping, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2471 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | hw/gt64xxx.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index ccb6a7c..2b01da7 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -222,18 +222,24 @@ typedef PCIHostState GT64120PCIState; typedef struct GT64120State { GT64120PCIState *pci; uint32_t regs[GT_REGS]; + target_phys_addr_t PCI0IO_start; + target_phys_addr_t PCI0IO_length; } GT64120State; static void gt64120_pci_mapping(GT64120State *s) { - target_phys_addr_t start, length; - /* Update IO mapping */ if ((s->regs[GT_PCI0IOLD] & 0x7f) <= s->regs[GT_PCI0IOHD]) { - start = s->regs[GT_PCI0IOLD] << 21; - length = ((s->regs[GT_PCI0IOHD] + 1) - (s->regs[GT_PCI0IOLD] & 0x7f)) << 21; - isa_mmio_init(start, length); + /* Unmap old IO address */ + if (s->PCI0IO_length) + { + cpu_register_physical_memory(s->PCI0IO_start, s->PCI0IO_length, IO_MEM_UNASSIGNED); + } + /* Map new IO address */ + s->PCI0IO_start = s->regs[GT_PCI0IOLD] << 21; + s->PCI0IO_length = ((s->regs[GT_PCI0IOHD] + 1) - (s->regs[GT_PCI0IOLD] & 0x7f)) << 21; + isa_mmio_init(s->PCI0IO_start, s->PCI0IO_length); } } |