target-arm: fix neon vshrn/vrshrn ops

In the existing code shift value is clobbered during the pass loop.
This patch changes the code so that it stores the intermediate
result in the target neon register directly and eliminates the need
to use a temporary to hold the intermediate value thus leaving the
shift value in the temporary variable intact. This is a new patch
in this version of the patch series.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

1 files changed, 3 insertions, 9 deletions

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 1988cc6..3fe545d 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -4680,18 +4680,12 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
                         else
                             gen_neon_narrow_satu(size - 1, tmp, cpu_V0);
                     }
-                    if (pass == 0) {
-                        if (size != 3) {
-                            dead_tmp(tmp2);
-                        }
-                        tmp2 = tmp;
-                    } else {
-                        neon_store_reg(rd, 0, tmp2);
-                        neon_store_reg(rd, 1, tmp);
-                    }
+                    neon_store_reg(rd, pass, tmp);
                 } /* for pass */
                 if (size == 3) {
                     tcg_temp_free_i64(tmp64);
+                } else {
+                    dead_tmp(tmp2);
                 }
             } else if (op == 10) {
                 /* VSHLL */