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| author | Blue Swirl <blauwirbel@gmail.com> | 2009-05-10 07:42:54 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2009-05-10 07:42:54 +0000 |
| commit | 6c78ea32e1f02216f45dee69a0c6ee0ca968fdac (patch) | |
| tree | 2a26af16290773fde11a974834a12ea54b4305f0 | |
| parent | 3b2d1e9286e1ddbb36499c9fd59e14b736441969 (diff) | |
| download | hqemu-6c78ea32e1f02216f45dee69a0c6ee0ca968fdac.zip hqemu-6c78ea32e1f02216f45dee69a0c6ee0ca968fdac.tar.gz | |
Convert udiv/sdiv
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | target-sparc/op_helper.c | 25 | ||||
| -rw-r--r-- | target-sparc/translate.c | 25 |
2 files changed, 31 insertions, 19 deletions
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index ddfe152..9de74c4 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -790,6 +790,29 @@ static inline uint32_t get_NZ_xcc(target_ulong dst) } #endif +static inline uint32_t get_V_div_icc(target_ulong src2) +{ + uint32_t ret = 0; + + if (src2 != 0) + ret |= PSR_OVF; + return ret; +} + +static uint32_t compute_all_div(void) +{ + uint32_t ret; + + ret = get_NZ_icc(CC_DST); + ret |= get_V_div_icc(CC_SRC2); + return ret; +} + +static uint32_t compute_C_div(void) +{ + return 0; +} + static inline uint32_t get_C_add_icc(target_ulong dst, target_ulong src1) { uint32_t ret = 0; @@ -1108,6 +1131,7 @@ typedef struct CCTable { static const CCTable icc_table[CC_OP_NB] = { /* CC_OP_DYNAMIC should never happen */ [CC_OP_FLAGS] = { compute_all_flags, compute_C_flags }, + [CC_OP_DIV] = { compute_all_div, compute_C_div }, [CC_OP_ADD] = { compute_all_add, compute_C_add }, [CC_OP_ADDX] = { compute_all_addx, compute_C_addx }, [CC_OP_TADD] = { compute_all_tadd, compute_C_tadd }, @@ -1123,6 +1147,7 @@ static const CCTable icc_table[CC_OP_NB] = { static const CCTable xcc_table[CC_OP_NB] = { /* CC_OP_DYNAMIC should never happen */ [CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc }, + [CC_OP_DIV] = { compute_all_logic_xcc, compute_C_logic }, [CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc }, [CC_OP_ADDX] = { compute_all_addx_xcc, compute_C_addx_xcc }, [CC_OP_TADD] = { compute_all_add_xcc, compute_C_add_xcc }, diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 91ff604..a69c708 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -701,19 +701,6 @@ static inline void gen_op_sdivx(TCGv dst, TCGv src1, TCGv src2) } #endif -static inline void gen_op_div_cc(TCGv dst) -{ - int l1; - - tcg_gen_mov_tl(cpu_cc_dst, dst); - gen_cc_clear_icc(); - gen_cc_NZ_icc(cpu_cc_dst); - l1 = gen_new_label(); - tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_cc_src2, 0, l1); - tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF); - gen_set_label(l1); -} - // 1 static inline void gen_op_eval_ba(TCGv dst) { @@ -3151,18 +3138,18 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_IU_FEATURE(dc, DIV); gen_helper_udiv(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { - gen_op_div_cc(cpu_dst); - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS); - dc->cc_op = CC_OP_FLAGS; + tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); + tcg_gen_movi_i32(cpu_cc_op, CC_OP_DIV); + dc->cc_op = CC_OP_DIV; } break; case 0xf: /* sdiv */ CHECK_IU_FEATURE(dc, DIV); gen_helper_sdiv(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { - gen_op_div_cc(cpu_dst); - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS); - dc->cc_op = CC_OP_FLAGS; + tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); + tcg_gen_movi_i32(cpu_cc_op, CC_OP_DIV); + dc->cc_op = CC_OP_DIV; } break; default: |
