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authorAndreas Färber <andreas.faerber@web.de>2013-06-30 20:36:15 +0200
committerAndreas Färber <afaerber@suse.de>2013-11-05 17:47:30 +0100
commit837cf1013e6e1aa821ce13d7f63bb3dc0a92a1ab (patch)
tree5359767080a038dce401a584863117999cc8c998
parenteb110bd843d3ef70850a7cf44d05056b8a3e81aa (diff)
downloadhqemu-837cf1013e6e1aa821ce13d7f63bb3dc0a92a1ab.zip
hqemu-837cf1013e6e1aa821ce13d7f63bb3dc0a92a1ab.tar.gz
a9mpcore: Convert to QOM realize
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
-rw-r--r--hw/cpu/a9mpcore.c36
1 files changed, 26 insertions, 10 deletions
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index db3907e..a162ff0 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -59,38 +59,56 @@ static void a9mp_priv_initfn(Object *obj)
qdev_set_parent_bus(DEVICE(&s->wdt), sysbus_get_default());
}
-static int a9mp_priv_init(SysBusDevice *dev)
+static void a9mp_priv_realize(DeviceState *dev, Error **errp)
{
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
A9MPPrivState *s = A9MPCORE_PRIV(dev);
DeviceState *gicdev, *scudev, *mptimerdev, *wdtdev;
SysBusDevice *timerbusdev, *wdtbusdev, *gicbusdev, *scubusdev;
+ Error *err = NULL;
int i;
gicdev = DEVICE(&s->gic);
qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq);
- qdev_init_nofail(gicdev);
+ object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
+ if (err != NULL) {
+ error_propagate(errp, err);
+ return;
+ }
gicbusdev = SYS_BUS_DEVICE(&s->gic);
/* Pass through outbound IRQ lines from the GIC */
- sysbus_pass_irq(dev, gicbusdev);
+ sysbus_pass_irq(sbd, gicbusdev);
/* Pass through inbound GPIO lines to the GIC */
- qdev_init_gpio_in(DEVICE(dev), a9mp_priv_set_irq, s->num_irq - 32);
+ qdev_init_gpio_in(dev, a9mp_priv_set_irq, s->num_irq - 32);
scudev = DEVICE(&s->scu);
qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu);
- qdev_init_nofail(scudev);
+ object_property_set_bool(OBJECT(&s->scu), true, "realized", &err);
+ if (err != NULL) {
+ error_propagate(errp, err);
+ return;
+ }
scubusdev = SYS_BUS_DEVICE(&s->scu);
mptimerdev = DEVICE(&s->mptimer);
qdev_prop_set_uint32(mptimerdev, "num-cpu", s->num_cpu);
- qdev_init_nofail(mptimerdev);
+ object_property_set_bool(OBJECT(&s->mptimer), true, "realized", &err);
+ if (err != NULL) {
+ error_propagate(errp, err);
+ return;
+ }
timerbusdev = SYS_BUS_DEVICE(&s->mptimer);
wdtdev = DEVICE(&s->wdt);
qdev_prop_set_uint32(wdtdev, "num-cpu", s->num_cpu);
- qdev_init_nofail(wdtdev);
+ object_property_set_bool(OBJECT(&s->wdt), true, "realized", &err);
+ if (err != NULL) {
+ error_propagate(errp, err);
+ return;
+ }
wdtbusdev = SYS_BUS_DEVICE(&s->wdt);
/* Memory map (addresses are offsets from PERIPHBASE):
@@ -129,7 +147,6 @@ static int a9mp_priv_init(SysBusDevice *dev)
sysbus_connect_irq(wdtbusdev, i,
qdev_get_gpio_in(gicdev, ppibase + 30));
}
- return 0;
}
static Property a9mp_priv_properties[] = {
@@ -147,9 +164,8 @@ static Property a9mp_priv_properties[] = {
static void a9mp_priv_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = a9mp_priv_init;
+ dc->realize = a9mp_priv_realize;
dc->props = a9mp_priv_properties;
}
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