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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-19 17:56:23 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-19 17:56:23 +0000 |
| commit | 15dcf5aa86656cea05847f6c9163ab884a161d12 (patch) | |
| tree | 63802cc56db38eb5d45668f6f11e7f67f1c0d886 | |
| parent | 7f1c9da99804235212888abda7ba7f06ee3afc70 (diff) | |
| download | hqemu-15dcf5aa86656cea05847f6c9163ab884a161d12.zip hqemu-15dcf5aa86656cea05847f6c9163ab884a161d12.tar.gz | |
Note more issues.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2335 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-mips/TODO | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/target-mips/TODO b/target-mips/TODO index 5dd1de3..e162ea5 100644 --- a/target-mips/TODO +++ b/target-mips/TODO @@ -1,12 +1,8 @@ Unsolved issues/bugs in the mips/mipsel backend ----------------------------------------------- -- MIPS64: - - No 64bit TLB support - - no 64bit wide registers for FPU - - 64bit mul/div handling broken - - DM[FT]C not implemented - +General +------- - TLB fails cornercase at address wrap around - [ls][dw][lr] report broken (aligned) BadVAddr - Missing per-CPU instruction decoding, currently all implemented @@ -14,4 +10,19 @@ Unsolved issues/bugs in the mips/mipsel backend - pcnet32 does not work for little endian emulation on big endian host (probably not mips specific, but observable for mips-malta) +MIPS64 +------ +- No 64bit TLB support +- no 64bit wide registers for FPU +- 64bit mul/div handling broken +- DM[FT]C not implemented + +"Generic" 4Kc system emulation +------------------------------ +- Doesn't correspond to any real hardware. + +MALTA system emulation +---------------------- - We fake firmware support instead of doing the real thing +- 2.4 Kernels receive spurious PIIX4 interrupts, indicates some + divergence from actual hardware. |
