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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2015-09-14 14:39:50 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-09-14 14:39:50 +0100
commit0c5fbf3b4c1e5210354de71a3dc2ebc8c8a01f31 (patch)
tree0de3092213334c0075de123d34e4d4bacba5dce0
parent1edee4708a0e3163cbf20fac325be456abd960bb (diff)
downloadhqemu-0c5fbf3b4c1e5210354de71a3dc2ebc8c8a01f31.zip
hqemu-0c5fbf3b4c1e5210354de71a3dc2ebc8c8a01f31.tar.gz
target-arm: Suppress EPD for S2, EL2 and EL3 translations
Stage-2 translations, EL2 and EL3 regimes don't have the EPD control. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1442135278-25281-6-git-send-email-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-arm/helper.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 200b9f2..478347b 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -6344,7 +6344,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
/* Read an LPAE long-descriptor translation table. */
MMUFaultType fault_type = translation_fault;
uint32_t level = 1;
- uint32_t epd;
+ uint32_t epd = 0;
int32_t tsz;
uint32_t tg;
uint64_t ttbr;
@@ -6438,7 +6438,9 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
*/
if (ttbr_select == 0) {
ttbr = regime_ttbr(env, mmu_idx, 0);
- epd = extract32(tcr->raw_tcr, 7, 1);
+ if (el < 2) {
+ epd = extract32(tcr->raw_tcr, 7, 1);
+ }
tsz = t0sz;
tg = extract32(tcr->raw_tcr, 14, 2);
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