| Commit message (Collapse) | Author | Age | Files | Lines |
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AAI mode
Change SPI architecture to handle 1-byte chunk chip writing differently from
256-byte chunk chip writing. Annotate SPI chip write functions with _256
or _1 suffix denoting the number of bytes they write at maximum. The 1-byte
chunk writing is cut-n-pasted to different SPI drivers right now. A later
patch can move them to the generic spi_chip_write_1.
Corresponding to flashrom svn r485.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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should handle such special opcode failure gracefully on ICH and
Compatible chipsets. This fixes chip erase on almost all ICH+VIA SPI masters.
Thanks to Ali Nadalizadeh for helping track down this bug!
Corresponding to flashrom svn r484.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Add missing copyright year.
Corresponding to flashrom svn r428 and coreboot v2 svn r4107.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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Reviewed-by: Joe, Bao <Zheng.Bao@amd.com>
Corresponding to flashrom svn r354 and coreboot v2 svn r3782.
Signed-off-by: Jason Wang <Qingpei.wang@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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This has been tested by Uwe Hermann on an RS690/SB600 board.
Reviewed-by: Joe Bao <zheng.bao@amd.com>
Corresponding to flashrom svn r351 and coreboot v2 svn r3779.
Signed-off-by: Jason Wang <Qingpei.Wang@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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