| Commit message (Collapse) | Author | Age | Files | Lines |
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Use a proper abstraction. Kill unneeded #include statements.
Corresponding to flashrom svn r672.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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Also, add support for the Silicon Image 3112(A) SATA controller.
Both have been tested by Andrew Morgan <ziltro@ziltro.com> on hardware
and work fine.
Corresponding to flashrom svn r613.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Andrew Morgan <ziltro@ziltro.com>
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It doesn't make sense to probe for SPI chips on a LPC host, nor does it
make sense to probe for LPC chips on a Parallel host.
This change is backwards compatible, but adding host protocol info to
chipset init functions will speed up probing.
Once all chipset init functions are updated and the Winbond W29EE011 and
AMIC A49LF040A chip definitions are updated, the W29EE011 workaround can
be deleted as the W29/A49 conflict magically disappears.
Tested on real hardware and
Corresponding to flashrom svn r560.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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Corresponding to flashrom svn r558.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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- Update manpage, we now report supported boards via -L. - Add some missing
escaping for '-' characters in the manpage. - Shorten some of the really
long device names, so that -L output looks nicer. - Display a "table header"
for all entries/columns in -L output. - Make -L output tabular for all lists
for better readability. - Do not print "unknown XXXX SPI chip" entries in
-L output. - And random other cosmetics...
Corresponding to flashrom svn r543.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
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Corresponding to flashrom svn r537.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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I tested identify, read, write, erase, verify successfully, HOWEVER,
this will only work (at least on my card) after de-soldering the
soldered-on PLCC32 one-time programmable (OTP) chip (Holtek HT27C010)
and soldering on a (re-)programmable flash ROM chip or a socket.
Example:
http://www.coreboot.org/File:Sii_controller1.jpg
http://www.coreboot.org/File:Sii_controller2.jpg
The OTP chip which came on my card does not react to the standard JEDEC
identify/read/write/erase commands anymore, so if all other such PCI0680
controllers which are around also have the same OTP chip (that's not
necessarily the case), they cannot be used as "external programmer" in
flashrom without the above mentioned modifications.
Corresponding to flashrom svn r536.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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special handling here
Corresponding to flashrom svn r531.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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Corresponding to flashrom svn r530.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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