| Commit message (Collapse) | Author | Age | Files | Lines |
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- x86/x86_64 (little endian)
- PowerPC (big endian)
- MIPS (big+little endian)
No changes to programmer specific code. This means any drivers with MMIO
access will _not_ suddenly start working on big endian systems, but with
this patch everything is in place to fix them.
Compilation should work on all architectures listed above for all
drivers except nic3com and nicrealtek which require PCI Port IO which is
x86-only for now.
To compile without nic3com and nicrealtek, run
make distclean
make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no
Thanks to Misha Manulis for testing early versions of this patch on
PowerPC (big endian) with the satasii programmer.
Thanks to Segher Boessenkool for design review and for helping out with
compiler tricks and pointing out that we need eieio on PowerPC.
Thanks to Vladimir Serbinenko for compile testing on MIPS (little
endian) and PowerPC (big endian) and for runtime testing on MIPS (little
endian).
Thanks to David Daney for compile testing on MIPS (big endian).
Thanks to Uwe Hermann for compile and runtime testing on x86_64.
DO NOT RUN FLASHROM ON NON-X86 AFTER APPLYING THIS PATCH!
This patch only provides the infrastructure, but does not convert any
drivers, so flashrom will compile, but it won't do the right thing on
non-x86 platforms.
Binary file (standard input) matches
Corresponding to flashrom svn r1013.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Misha Manulis <misha@manulis.com>
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Original patch by Vadim Girlin.
Message printing updated by Carl-Daniel Hailfinger.
Corresponding to flashrom svn r989.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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a board enable
Move boards which had an IT87* SPI board enable from the board enable list to
the OK list. Mark the Gigabyte GA-MA78GPM-DS2H as OK. Change the it87spi forced
port parameter to it87spiport=... Fix incorrect indentation in the man page.
Tested by Ward Vandewege on both variants of the Gigabyte GA-M57SLI-S4
http://www.flashrom.org/pipermail/flashrom/2010-March/002712.html Binary file
(standard input) matches
Corresponding to flashrom svn r983.
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- Fix coding-style, whitespace, and indentation in a few places.
- Consistently use the same spelling ("Super I/O") everywhere.
- Make some flashrom stdout output look a bit nicer.
Corresponding to flashrom svn r933.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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flash.h
Some of the spi programmer drivers required chipdrivers.h, needs fixing later:
it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c
bitbang_spi.c dediprog.c
Corresponding to flashrom svn r914.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Change one msg_pdbg to msg_pinfo, change 7 msg_pinfo to msg_pdbg.
Corresponding to flashrom svn r855.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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We could run it after chipset enable, but it definitely has to happen before
board enable because the board enable usually accesses the SuperI/O. With this
patch, it is possible to add a struct superio to the board enable table for
more accurate matching in case subsystem IDs are ambiguous. This patch focuses
on the generic infrastructure aspect and on support for IT8712F/IT8716F.
Thanks go to Adrian Glaubitz and Ward Vandewege for testing.
Corresponding to flashrom svn r813.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
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functions in struct flashchip
I decided to fill in the info for a few chips to illustrate how this works
both for uniform and non-uniform sector sizes. struct eraseblock{ int size;
/* Eraseblock size */ int count; /* Number of contiguous blocks with that
size */ }; struct eraseblock doesn't correspond with a single erase block,
but with a group of contiguous erase blocks having the same size. Given a
(top boot block) flash chip with the following weird, but real-life structure:
top 16384 8192 8192 32768 65536 65536 65536 65536 65536 65536 65536 bottom we
get the following encoding: {65536,7},{32768,1},{8192,2},{16384,1} Although
the number of blocks is bigger than 4, the number of block groups is only 4.
If you ever add some flash chips with more than 4 contiguous block groups,
the definition will not fit into the 4-member array anymore and gcc will
recognize that and error out. No undetected overflow possible. In that case,
you simply increase array size a bit. For modern flash chips with uniform
erase block size, you only need one array member anyway. Of course data types
will need to be changed if you ever get flash chips with more than 2^30
erase blocks, but even with the lowest known erase granularity of 256 bytes,
these flash chips will have to have a size of a quarter Terabyte. I'm pretty
confident we won't see such big EEPROMs in the near future (or at least not
attached in a way that makes flashrom usable). For SPI chips, we even have
a guaranteed safety factor of 4096 over the maximum SPI chip size (which is
2^24). And if such a big flash chip has uniform erase block size, you could
even split it among the 4 array members. If you change int count to unsigned
int count, the storable size doubles. So with a split and a slight change
of data type, the maximum ROM chip size is 2 Terabytes. Since many chips
have multiple block erase functions where the eraseblock layout depends on
the block erase function, this patch couples the block erase functions with
their eraseblock layouts. struct block_eraser { struct eraseblock{ unsigned
int size; /* Eraseblock size */ unsigned int count; /* Number of contiguous
blocks with that size */ } eraseblocks[NUM_ERASEREGIONS]; int (*block_erase)
(struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen);
} block_erasers[NUM_ERASEFUNCTIONS];
Corresponding to flashrom svn r719.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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The __func__ variant is standardized in C99 and recommended to be
used instead of __FUNCTION__ in the gcc info page.
Only _very_ old versions of gcc did not know about __func__, but we've
been using both __func__ and __FUNCTION__ for a long while now, and
nobody complained about this, so all our users seem to use recent
enough compilers.
Corresponding to flashrom svn r711.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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This allows us to reduce #ifdef clauses a lot if we compile out some
programmers completely.
Corresponding to flashrom svn r679.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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include the automatic erase present in other chip drivers
Since the majority is definitely auto-erase, change the remaining
explicit-erase cases to be auto-erase as well.
Corresponding to flashrom svn r673.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carlos Arnau Perez <cemede@gmail.com>
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Some drivers support only a few combinations of read/write length and return
error otherwise. Having a distinct return code for this error means we can
handle it in upper layers.
Corresponding to flashrom svn r653.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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Tested it on Epia-m700 worked okay.
Tested-by: Jakob Bornecrantz <wallbraker@gmail.com>
Corresponding to flashrom svn r651.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>
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programmer mode
If the parameter is set, the IT87* SPI driver will set the I/O base port of
the IT87* SPI controller interface to the port specified in the parameter.
Usage: flashrom -p it87spi=port=0x820
Corresponding to flashrom svn r646.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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Some SPI opcodes need to be sent in direct succession after each other
without any chip deselect happening in between. A prominent example is
WREN (Write Enable) directly before PP (Page Program). Intel calls the
first opcode in such a row "preopcode".
Right now, we ignore the direct succession requirement completely and it
works pretty well because most onboard SPI masters have a timing or
heuristics which make the problem disappear.
The FT2232 SPI flasher is different. Since it is an external flasher,
timing is very different to what we can expect from onboard flashers and
this leads to failure at slow speeds.
This patch allows any function to submit multiple SPI commands in a
stream to any flasher. Support in the individual flashers isn't
implemented yet, so there is one generic function which passes the each
command in the stream one-by-one to the command functions of the
selected SPI flash driver.
Tested-by: Jakob Bornecrantz <wallbraker@gmail.com>
Corresponding to flashrom svn r645.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>
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If the programmer didn't initialize correctly, it is pointless to continue.
Fix standalone IT87* SPI init to set flashbus to NONE if no IT87* SPI
communication is possible. Print the I/O port detected by the IT87* SPI code.
Corresponding to flashrom svn r633.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
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single chip supported by flashrom
That means you can tell flashrom to read exactly bytes 12345-56789 (start
12345, length 44445) and it will not fetch a single byte more. Uwe tested
this on one LPC, one SPI, and one parallel flash board.
Corresponding to flashrom svn r596.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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This was partly due to a design problem in the abstraction layer.
There should be exactly two different functions for reading SPI chips:
- memory mapped reads
- SPI command reads.
Each of them should be contained in a separate function, optionally
taking parameters where needed.
This patch solves the problems mentioned above, shortens the code and
makes the code logic a lot more obvious.
Since open-coding the min() function leads to errors, include it in this
patch as well.
Corresponding to flashrom svn r589.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
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the delay on their own if needed
Corresponding to flashrom svn r578.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Urja Rannikko <urjaman@gmail.com>
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It doesn't make sense to probe for SPI chips on a LPC host, nor does it
make sense to probe for LPC chips on a Parallel host.
This change is backwards compatible, but adding host protocol info to
chipset init functions will speed up probing.
Once all chipset init functions are updated and the Winbond W29EE011 and
AMIC A49LF040A chip definitions are updated, the W29EE011 workaround can
be deleted as the W29/A49 conflict magically disappears.
Tested on real hardware and
Corresponding to flashrom svn r560.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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This is a fast way to test if a IT87xx board_enable() would work.
Tested-by: Harald Gutmann <harald.gutmann@gmx.net>
Corresponding to flashrom svn r557.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Harald Gutmann <harald.gutmann@gmx.net>
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Right now, the annotation only differentiates between SPI and non-SPI. Anyone
who knows more about a specific flash chip should feel free to update it.
The existing flashbus variable was abused to denote the SPI controller type.
Use an aptly named variable for that purpose. Once this patch is merged,
the chipset/programmer init functions can set supported flash chip types
and flashrom can automatically select only matching probe/read/erase/write
functions. A side benefit of that will be the elimination of the Winbond
W29EE011 vs. AMIC A49LF040A conflict.
Corresponding to flashrom svn r556.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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We had duplicated code under different names and even open-coded some functions
in some places. wbsio_read/regval -> sio_read wbsio_write/regwrite -> sio_write
wbsio_mask -> sio_mask board_biostar_p4m80_m4 now uses existing IT87 functions.
Corresponding to flashrom svn r547.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
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Build-tested on 32bit x86.
Corresponding to flashrom svn r521.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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AAI mode
Change SPI architecture to handle 1-byte chunk chip writing differently from
256-byte chunk chip writing. Annotate SPI chip write functions with _256
or _1 suffix denoting the number of bytes they write at maximum. The 1-byte
chunk writing is cut-n-pasted to different SPI drivers right now. A later
patch can move them to the generic spi_chip_write_1.
Corresponding to flashrom svn r485.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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should handle such special opcode failure gracefully on ICH and
Compatible chipsets. This fixes chip erase on almost all ICH+VIA SPI masters.
Thanks to Ali Nadalizadeh for helping track down this bug!
Corresponding to flashrom svn r484.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Corresponding to flashrom svn r379 and coreboot v2 svn r3858.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Yul Rottmann <yulrottmann@bitel.net>
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Corresponding to flashrom svn r326 and coreboot v2 svn r3669.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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While writing a new SPI driver I fixed some things in the SPI code:
All calls to spi_command() had unneccessary #define duplications, and in some
cases the read count define could theoretically become harmful because NULL was
passed for the read buffer. Avoid a crash, should someone change the #defines.
I also noticed that the only caller of spi_page_program() was the it87 driver,
and spi_page_program() could only call back into the it87 driver. Removed the
function for easier-to-follow code and made it8716f_spi_page_program() static.
The ichspi driver's static page functions are already static.
Corresponding to flashrom svn r302 and coreboot v2 svn r3418.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
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flash bus
At some point the flash bus will be part of struct flashchip. Pardon me for
pushing this in, but I think it is important to beware of further decay and
it will improve things for other developers in the short run. Carl-Daniel, I
will consider your suggestions in another patch. I want to keep things from
getting too much for now. The patch includes Rudolf's VIA SPI changes though.
Corresponding to flashrom svn r285 and coreboot v2 svn r3401.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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This patch addresses different argument order of outX() calls,
FreeBSD-specific headers, difference in certain type names and system
interface names, and also FreeBSD-specific way of gaining IO port
access.
Corresponding to flashrom svn r245 and coreboot v2 svn r3344.
Signed-off-by: Andriy Gapon <avg@icyb.net.ua>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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decodes any address to the attached SPI ROM
Corresponding to flashrom svn r238 and coreboot v2 svn r3324.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
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No behavioural changes, but greatly improved SPI abstraction.
Corresponding to flashrom svn r229 and coreboot v2 svn r3305.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
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