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* Add a bunch of new/tested stuff and various small changes 22Stefan Tauner2015-02-081-4/+4
| | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - AOpen UK79G-1394 (used in EZ18 barebones) Reported by Lawrence Gough - ASUS M4N78 SE Reported by Dima Veselov - ASUS P5LD2-VM Mark board enable as tested (reported by Dima Veselov) - GIGABYTE GA-970A-UD3P (rev. 2.0) Reported by trucmar on IRC - GIGABYTE GA-990FXA-UD3 (rev. 4.0) Reported by ROKO__ on IRC - GIGABYTE GA-H77-DS3H (rev. 1.1) Reported by Evgeniy Edigarev - GIGABYTE GA-P55-USB3 (rev. 2.0) Binary file (standard input) matches Corresponding to flashrom svn r1879.
* Add support for Intel Silvermont: Bay Trail, Rangeley and AvotonDuncan Laurie2014-08-201-6/+8
| | | | | | | | | | | | | | | | | | | | | | | The core of this patch to support Bay Trail originally came from the Chromiumos flashrom repo and was modified by Sage to support the Rangeley/Avoton parts as well. Because that was not complicated enough already Stefan Tauner refactored and refined everything. Bay Trail seems to be the first Atom SoC able to support hwseq. No SPI Programming Guide could be obtained so it is handled similarly to Lynx Point which seems to be its nearest relative. Tested-by: Marc Jones <marcj303@gmail.com> Tested-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Tested-by: Thomas Reardon <thomas_reardon@hotmail.com> Tested-by: Wen Wang <wen.wang@adiengineering.com> Corresponding to flashrom svn r1844. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Martin Roth <gaumless@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Marc Jones <marcj303@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Refine Flash Component descriptor handlingStefan Tauner2014-08-201-9/+21
| | | | | | | | | | | | | | | Possible values as well as encodings have changed in newer chipsets as follows. - Pre-PCH (i.e. ICH) chipsets had a maximum frequency of 33 MHz for all operations - Since Cougar Point the chipsets support dual output fast reads (encoded in bit 30). - Flash component density encoding has changed from 3 to 4 bits with Lynx Point, currently allowing for up to 64 MB chips. Corresponding to flashrom svn r1843. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* ichspi: fix missing set_addr on erases and possible crossings of 256 B ↵Stefan Tauner2014-08-051-0/+8
| | | | | | | | | | | | | | boundaries Apparently the erase function did never set any address before issuing the erase commands. How could this ever work? Also, according to PCH documentation crossing 256 byte boundaries is invalid and may cause wraparound due to the flash chip's pages. Check for this on reads as well as writes. Binary file (standard input) matches Corresponding to flashrom svn r1837.
* Rename programmer registration functionsCarl-Daniel Hailfinger2014-07-191-13/+13
| | | | | | | | | | | | Register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Corresponding to flashrom svn r1831. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add 'const' keyword to chip write and other function prototypesMark Marshall2014-05-091-2/+1
| | | | | | | | | | Inspired by and mostly based on a patch Corresponding to flashrom svn r1789. Signed-off-by: Mark Marshall <mark.marshall@omicron.at> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Refactor Intel Chipset EnablesStefan Tauner2013-10-251-47/+14
| | | | | | | | | | | | | | | | | | | | | - Combine enable_flash_ich_4e() and enable_flash_ich_dc() to enable_flash_ich_fwh(). - Remove unjustified (chipset) name parameters from various enable_flash_ich* functions. - Make Poulsbo and Tunnel Creek use generic enables by refining existing functions to work with them, including everything in ichspi.c. - Refactor enable_flash_ich_fwh_decode() to be called unconditionally for all chipsets. - Add support for Intel Atom Centerton (S12x0). - Recombine ICH2/3/4/5 to CHIPSET_ICH2345 because we treat them equally anyway. - Move spibar handling out of ich_init_spi() into enable_flash_ich_spi() - Various small cleanups. Corresponding to flashrom svn r1761. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Automatically unmap physmap()sStefan Tauner2013-08-141-1/+3
| | | | | | | | | | | | Similarly to the previous PCI self-clean up patch this one allows to get rid of a huge number of programmer shutdown functions and makes introducing bugs harder. It adds a new function rphysmap() that takes care of unmapping at shutdown. Callers are changed where it makes sense. Corresponding to flashrom svn r1714. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested stuff and various small changes 19Stefan Tauner2013-08-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - ASUS P8H77-V LE http://www.flashrom.org/pipermail/flashrom/2013-June/011127.html - HP Pegatron IPMEL-AE (Evans-GL6) Reported by Idwer on IRC - MSI MS-7379 (G31M) http://paste.flashrom.org/view.php?id=1726 - MSI MS-7816 (H87-G43) http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html - MSI MS-9830 (IM-945GSE-A, A9830IMS) http://paste.flashrom.org/view.php?id=1730 - Supermicro X8SAX http://paste.flashrom.org/view.php?id=1717 NOT OK: - Intel D2700MUD http://paste.flashrom.org/view.php?id=1723 - Intel DQ45CB http://www.flashrom.org/pipermail/flashrom/2013-August/011369.html Chipsets: - Add PCI ID for Intel's Coleto Creek. - Mark Intel H87 (0x8c4a) as OK. http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html Miscellaneous: - ichspi: Fix printing address ranges if space is divided by FPB. - Tiny other stuff. Corresponding to flashrom svn r1709. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Change warning regarding protected ICH regionsStefan Tauner2013-06-011-5/+4
| | | | | | | | | | | There is no good reason to collect further log files of locked Intel- based boards. Forward affected users directly to an explanation in the wiki instead. Corresponding to flashrom svn r1675. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Fix duplicate 'const' declaration specifiersStefan Tauner2013-01-151-1/+1
| | | | | | | | | | Thanks to Idwer and clang for noticing these problems. Corresponding to flashrom svn r1646. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Introduce msg_*warnStefan Tauner2013-01-041-5/+5
| | | | | | | | | | Also, unify all outputs of "Warning:" and "Error:" to use normal capitalization instead of mixing it with all capitals. Corresponding to flashrom svn r1643. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Add a bunch of new/tested stuff and various small changes 15Stefan Tauner2012-10-201-13/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - Foxconn P55MX http://www.flashrom.org/pipermail/flashrom/2012-October/010002.html Tested flash chips: - Eon EN25F64 to PR (+PR) http://paste.flashrom.org/view.php?id=1426 - Macronix MX25L1005 to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-October/010004.html - Set SST39VF512 to PREW (+W) http://www.flashrom.org/pipermail/flashrom/2012-September/009958.html Tested chipsets: - Z77 (only reading was really tested) Miscellaneous: - Fix ft2232_spi's parameter parsing. - Fix nicrealtek's init (always segfaulted since r1586 oops). - Add another T60 variant to the laptop whitelist. - Improve message shown when image file size does not match flash chip - Refine messages regarding the flash descriptor override strap according to the findings by Vladislav Bykov on his P55MX. - Fix the ID of EN25F64. - Demote and clarify debug message in serprog_delay(). - Minor other cleanups. Corresponding to flashrom svn r1613. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add a bunch of new/tested stuff and various small changes 14Stefan Tauner2012-09-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - ASUS M3A78-EH http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html - ASUS P2B-LS http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html - Biostar TA790GX A3+ http://paste.flashrom.org/view.php?id=1350 - ECS 848P-A7 http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html - GIGABYTE GA-G41MT-S2PT Reported on IRC - GIGABYTE GA-H77-D3H Reported and tested by Alexander Gordeev on IRC. - Gigabyte GA-X79-UD5 http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html - Shuttle FN78S http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - VIA EITX-3000 Reported on IRC by Tuju NOT OK: - Dell PowerEdge C6220 (0HYFFG) http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html - Foxconn Q45M http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html - MSI MS-7309 (K9N6SGM-V) http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html - Supermicro X9QRi-F+ http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - ZOTAC H61-ITX WiFi (H61ITX-A-E) http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html ASUS CUSL2-C has been tested to be working with the board enable once implemented for the TUSL2-C board. They seem to have the same PCI IDs as shown in the links below. Since only the CUSL2-C board enable has been tested yet, we distinguish the two by DMI strings. http://paste.flashrom.org/view.php?id=1393 http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml Tested flash chips: - Set EMST F25L008A to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - Set GigaDevice GD25Q64 to PREW (+PREW) http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea - Set Macronix MX25L12805 to P (+P) http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - Set SST SST49LF003A/B to PREW (+EW) http://paste.flashrom.org/view.php?id=467 - Set Winbond W49V002FA to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html Tested chipsets: - Intel X79 (0x1d41) http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html Board enables: - add ASUS P4P800-X Created by Idwer Vollering and tested by Mingsen Bao: http://paste.flashrom.org/view.php?id=467 - add DMI string to P4P800-VM Miscellaneous: - Add remaining Intel 7 series chipset (LPC) PCI IDs - Add generic SPI detection for chips from Winbond - Minor manpage changes - Minor other cleanups - Escape full stops after abbreviations in the manpage. - Add ICH9 and successors to spi_get_valid_read_addr Corresponding to flashrom svn r1601. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* ichspi: ignore bogus FREGsStefan Tauner2012-08-271-1/+1
| | | | | | | | | | | | | | | | | | Some vendors forget to disable regions properly and set their FRAP bits and FREG to 0. While not documented publicly this is being ignored by the chipset(s)[1] and hence flashrom should do so too. Without this patch flashrom prints a warning and disables writes. The check for i (region index) excludes the descriptor region which should not be becessary because specs suggest that the descriptor region should not be locked, but if vendors would follow the specs this patch would not have been necessary in the first place. [1]: http://www.flashrom.org/pipermail/flashrom/2012-May/009303.html Corresponding to flashrom svn r1587. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Make struct flashchip a field in struct flashctx instead of a complete copyCarl-Daniel Hailfinger2012-08-251-6/+6
| | | | | | | | | | | | All the driver conversion work and cleanup has been done by Stefan. flashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel. Corresponding to flashrom svn r1579. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix VIA VX*** supportHelge Wagner2012-08-241-5/+3
| | | | | | | | | | | | | | | | | | | | | | | Helge Wagner's patch that added VIA VX900 chipset support made me look closer at the datasheets which led to some concise documentation about newer VIA chipsets: http://flashrom.org/VIA Based on that this patch adds full support for VX800/VX820, VX855/VX875 and VX900, including SPI and LPC. VT8237S was not changed (SPI support only) because there is no public datasheet and it is not clear how to distinguish between LPC and SPI strapping and investigations in (NDAed) documents have not brought up anything conclusively. enable_flash_vt823x could probably be enhanced too due to various ignored LPC options of the chipset. Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Corresponding to flashrom svn r1578. Signed-off-by: Helge Wagner <Helge.Wagner@ge.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested stuff and various small changes 13Stefan Tauner2012-07-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - ASRock A780FullHD http://www.flashrom.org/pipermail/flashrom/2012-July/009599.html - ASRock 880G Pro3 http://www.flashrom.org/pipermail/flashrom/2012-July/009492.html - ASRock N61P-S http://www.flashrom.org/pipermail/flashrom/2012-May/009316.html - ASUS M2N68-VM http://www.flashrom.org/pipermail/flashrom/2012-May/009334.html - ASUS M3N78 PRO http://www.flashrom.org/pipermail/flashrom/2012-July/009519.html - ASUS M4N68T V2 http://www.flashrom.org/pipermail/flashrom/2012-May/009277.html - ASUS M5A78L-M LX reported by clavile on IRC - ASUS P8P67 PRO (rev. 3.0) http://www.flashrom.org/pipermail/flashrom/2012-April/009188.html - ASUS P8Z68-V reported by Kano on IRC http://paste.flashrom.org/view.php?id=1232 - ASUS SABERTOOTH 990FX http://paste.flashrom.org/view.php?id=1214 - Dell Inspiron 1420 http://www.flashrom.org/pipermail/flashrom/2012-May/009196.html - ECS GF8200A http://www.flashrom.org/pipermail/flashrom/2012-May/009256.html - GIGABYTE GA-H61M-D2H-USB3 http://www.flashrom.org/pipermail/flashrom/2012-May/009333.html - MSI MS-7250 (K9N SLI (rev 2.1)) http://www.flashrom.org/pipermail/flashrom/2012-June/009436.html - MSI MS-7676 (Z68MA-G45 (B3)) http://www.flashrom.org/pipermail/flashrom/2012-June/009424.html - Palit N61S http://www.flashrom.org/pipermail/flashrom/2012-May/009212.html NOT OK: - ASRock H61M-ITX http://www.flashrom.org/pipermail/flashrom/2012-May/009224.html - Dell Latitude E6520 http://www.flashrom.org/pipermail/flashrom/2012-May/009197.html - Dell Vostro 3700 http://www.flashrom.org/pipermail/flashrom/2012-May/009197.html - Intel DH61AG http://www.flashrom.org/pipermail/flashrom/2012-June/009417.html - Intel DQ965GF http://www.flashrom.org/pipermail/flashrom/2012-May/009295.html - HP/Compaq 8100 Elite CMT PC (304Bh) http://paste.flashrom.org/view.php?id=1182 - HP Z400 Workstation (0AE4h) http://www.flashrom.org/pipermail/flashrom/2012-June/009350.html - Supermicro X9DR3-F http://www.flashrom.org/pipermail/flashrom/2012-June/009422.html Tested flash chips: - mark AMIC A25L032 as TEST_OK_PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-June/009363.html - mark Atmel AT25DF321A as TEST_OK_PREW (+REW) http://www.flashrom.org/pipermail/flashrom/2012-July/009492.html - mark Atmel AT26DF161 as TEST_OK_PR (+PR) http://www.flashrom.org/pipermail/flashrom/2012-June/009350.html - mark Eon EN25QH16 as TEST_OK_PR (+PR) http://www.flashrom.org/pipermail/flashrom/2012-July/009566.html - mark SST SST39VF010 as TEST_OK_PREW (+W) http://www.flashrom.org/pipermail/flashrom/2012-June/009425.html - mark ST M25P64 as TEST_OK_PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-May/009332.html Tested chipset enables: - Intel 3420 http://www.flashrom.org/pipermail/flashrom/2012-May/009332.html - Add board enable for ASUS P5GD2-X lspci: http://paste.flashrom.org/view.php?id=1234 write: http://paste.flashrom.org/view.php?id=1240 Miscellaneous - Reorder some boards in print.c. - Remove broken abit URLs. - Whitespace changes. - Fix the maximum number of southbridge straps in the ICH descriptor structs. - Refine documentation regarding ICH region lock bits. - Demote verbosity of ICH Opcode reprogramming to -VV. - Exclude Pony-SPI for DOS targets (missing serial support). Corresponding to flashrom svn r1554. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Hide hwaccess.h from public APIPatrick Georgi2012-07-201-0/+1
| | | | | | | | | | | | | Move hwaccess.h #include from flash.h to individual drivers. libflashrom users need flash.h, but they do not care about hwaccess.h and should not see its definitions because they may conflict with other hardware access functions and #defines used by the libflashrom user. Corresponding to flashrom svn r1549. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Let the programmer driver decide how to do AAI transfersNico Huber2012-06-151-0/+3
| | | | | | | | | | | | | | | | Currently spi_aai_write() is implemented without an abstraction mechanism for the programmer driver. This adds another function pointer 'write_aai' to struct spi_programmer, which is set to default_spi_write_aai (renamed spi_aai_write) for all programmers for now. A patch which utilises this abstraction in the dediprog driver will follow. Corresponding to flashrom svn r1543. Signed-off-by: Nico Huber <nico.huber@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Refine reprogram_opcode_on_the_fly to indicate wrong readcnt/writecnt ↵Stefan Tauner2012-05-061-13/+14
| | | | | | | | | combinations Corresponding to flashrom svn r1531. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested stuff and various small changes 10Paul Menzel2012-02-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - ABIT A-S78H http://www.flashrom.org/pipermail/flashrom/2012-January/008603.html - ASRock AM2NF6G-VSTA http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html - ASUS KFSN4-DRE/SAS reported by ted on IRC - ASUS M2A-VM (HDMI variant) http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html - ASUS M4N78 PRO http://www.flashrom.org/pipermail/flashrom/2012-January/008598.html - ASUS P5K-V http://www.flashrom.org/pipermail/flashrom/2012-February/008737.html - ASUS P5KPL-CM http://www.flashrom.org/pipermail/flashrom/2012-January/008522.html - ASUS P5N7A-VM http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html - ASUS P5QPL-AM http://www.flashrom.org/pipermail/flashrom/2012-January/008557.html - ECS GF7100PVT-M3 http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html - ECS K7SEM http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html - ECS P4M800PRO-M V2.0 http://www.flashrom.org/pipermail/flashrom/2012-January/008478.html - Gigabyte 880GMA-USB3 http://www.flashrom.org/pipermail/flashrom/2012-February/008715.html - Gigabyte GA-EP31-DS3L http://www.flashrom.org/pipermail/flashrom/2012-January/008601.html - Gigabyte GA-X58A-UDR3 http://www.flashrom.org/pipermail/flashrom/2012-January/008572.html - Gigabyte GA-Z68XP-UD3 http://paste.flashrom.org/view.php?id=1058 - HP ProLiant N40L http://www.flashrom.org/pipermail/flashrom/2012-February/008650.html - MSI MS-7309 (K9N6PGM2-V2) http://www.flashrom.org/pipermail/flashrom/2011-December/008441.html - MSI MS-7548 (Aspen-GL8E used in HP Pavilion a6750f) http://www.flashrom.org/pipermail/flashrom/2012-February/008666.html - MSI MS-7676 (H67MA-ED55(B3)) http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html - PC Engines Alix.6f2 Reported by Philip Prindeville on IRC - Shuttle AV18E2 http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html - Supermicro X8DTE-F http://www.flashrom.org/pipermail/flashrom/2011-November/008304.html - Supermicro X8DTT-HIBQF http://www.flashrom.org/pipermail/flashrom/2012-January/008520.html NOT OK: - ASUS P8H61-M LE/USB3 http://www.flashrom.org/pipermail/flashrom/2012-January/008491.html - ASUS P8H67-M PRO http://www.flashrom.org/pipermail/flashrom/2011-December/008321.html - ASUS P8Z68-V PRO http://www.flashrom.org/pipermail/flashrom/2012-January/008469.html - Clevo P150HM (laptop) http://www.flashrom.org/pipermail/flashrom/2012-February/008717.html - Intel D425KT http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html - Supermicro X9SCA-F http://www.flashrom.org/pipermail/flashrom/2011-December/008313.html Tested flash chips: - mark AT29C512 as TEST_OK_PREW http://paste.flashrom.org/view.php?id=977 - mark M25P40 as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2011-December/008351.html - mark M25PE80 as TEST_OK_PREW http://paste.flashrom.org/view.php?id=1061 - mark MX25L6405 as TEST_OK_PREW tested myself with an MX25L6436E variant on serprog - mark W39V080A as TEST_OK_PREW http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html Tested chipsets: - SiS 730 (:0730) http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html - NVIDIA MCP61 (:03e0) http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html - NVIDIA MCP73 (:07d7) http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html - NVIDIA MCP79 (:0aac) http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html - VIA VT82C69x (0691) and VT82C686A/B (:0686) http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html - AMD's SB950 (and presumably also SB920) have the same PCI ID as previous generations, hence change the chipset enable device string. Thanks to Christian Ruppert for the suggestion. - Fix the board enable of the abit NF-M2 nView which had the IDs of its onboard graphics card in its pattern. Change this to the LPC controller. - Intel X79 SPI registers are identical to 6 Series', so use the chipsetenable wrapper of it (enable_flash_pch6). - Fix two paranoid checks for address < 0 in ichspi.c which became futile (and generate clang warnings) with the unsignify patch committed in r1470. - Rename AT25DF641 to AT25DF641(A). They are almost idencical, but could be distinguished by an extended RDID probe (Atmel's patented EDI procedure), which we do not support yet, hence handle them as one model for now. - Source format fixes and typos the addition of the ASRock AM2NF6G-VSTA to print.c is everything else is Corresponding to flashrom svn r1499. Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* ichspi.c: warn user and disable writes when a protected address range is ↵Stefan Tauner2012-02-161-25/+74
| | | | | | | | | | | | | | | detected This includes not only the notorious read-only flash descriptors and locked ME regions, but also the more rarely used PRs (Protected Ranges). The user can enforce write support by specifying ich_spi_force=yes in the programmer options, but we don't tell him the exact syntax interactively. He has to read it up in the man page. Corresponding to flashrom svn r1494. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Have all programmer init functions register bus masters/programmersCarl-Daniel Hailfinger2011-12-201-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All programmer types (Parallel, SPI, Opaque) now register themselves into a generic programmer list and probing is now programmer-centric instead of chip-centric. Registering multiple SPI/... masters at the same time is now possible without any problems. Handling multiple flash chips is still unchanged, but now we have the infrastructure to deal with "dual BIOS" and "one flash behind southbridge and one flash behind EC" sanely. A nice side effect is that this patch kills quite a few global variables and improves the situation for libflashrom. Hint for developers: struct {spi,par,opaque}_programmer now have a void *data pointer to store any additional programmer-specific data, e.g. hardware configuration info. Note: flashrom -f -c FOO -r forced_read.bin does not work anymore. We have to find an architecturally clean way to solve this. Corresponding to flashrom svn r1475. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add struct flashctx * parameter to all functions accessing flash chipsCarl-Daniel Hailfinger2011-12-181-16/+18
| | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Corresponding to flashrom svn r1474. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use struct flashctx instead of struct flashchip for flash chip accessCarl-Daniel Hailfinger2011-12-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | Struct flashchip is used only for the flashchips array and for operations which do not access hardware, e.g. printing a list of supported flash chips. struct flashctx (flash context) contains all data available in struct flashchip, but it also contains runtime information like mapping addresses. struct flashctx is expected to grow additional members over time, a prime candidate being programmer info. struct flashctx contains all of struct flashchip with identical member layout, but struct flashctx has additional members at the end. The separation between struct flashchip/flashctx shrinks the memory requirement of the big flashchips array and allows future extension of flashctx without having to worry about bloat. Corresponding to flashrom svn r1473. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Unsignify lengths and addresses in chip functions and structsStefan Tauner2011-11-231-2/+4
| | | | | | | | | | Push those changes forward where needed to prevent new sign conversion warnings where possible. Corresponding to flashrom svn r1470. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: fix ich_init_opcodes() calls in ich_init_spi()Stefan Tauner2011-11-131-2/+2
| | | | | | | | | | | | | | By calling it early ichspi_lock was not set up correctly in accordance with the corresponding register, hence ich_init_opcodes() was always trying to programming the opcodes instead of reading them in from the opmenu in case of a locked down configuration. Thanks to Jonathan A. Kollasch for reporting this bug. Corresponding to flashrom svn r1464. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Register Parallel/LPC/FWH programmers the same way SPI programmers are ↵Carl-Daniel Hailfinger2011-11-091-1/+1
| | | | | | | | | | | | | | | | | | | | registered All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Corresponding to flashrom svn r1463. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* ichspi: print flash descriptor dependent information only when it is validStefan Tauner2011-11-081-26/+33
| | | | | | | | | Also, fix some coding style issues. Corresponding to flashrom svn r1462. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add support for Intel Hardware SequencingStefan Tauner2011-11-081-10/+292
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the new opaque programmer framework this patch adds support for Intel Hardware Sequencing on ICH8 and its successors. By default (or when setting the ich_spi_mode option to auto) the module tries to use swseq and only activates hwseq if need be: - if important opcodes are inaccessible due to lockdown - if more than one flash chip is attached. The other options (swseq, hwseq) select the respective mode (if possible). A general description of Hardware Sequencing can be found in this blog entry: http://blogs.coreboot.org/blog/2011/06/11/gsoc-2011-flashrom-part-1/ Besides adding hwseq this patch also introduces these unrelated changes: - Fix enable_flash_ich_dc_spi to pass ERROR_FATAL from ich_init_spi. The whole error handling looks a bit odd to me, so this patch does change very little. Also, it does not touch the tunnelcreek method, which should be refactored anyway. - Add null-pointer guards to find_opcode and find_preop to matches the other opcode methods better: curopcodes == NULL has some meaning and is actively used/checked in other functions. TODO: adding real documentation when we have a directory for it Corresponding to flashrom svn r1461. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: use a variable to distinguish ich generations instead of ↵Stefan Tauner2011-11-061-52/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_programmer->type The type member is enough most of the time to derive the wanted information, but - not always (e.g. ich_set_bbar), - only available after registration, which we want to delay till the end of init, and - we really want to distinguish between chipset version-grained attributes which are not reflected by the registered programmer. Hence this patch introduces a new static variable which is set up early by the init functions and allows us to get rid of all "switch (spi_programmer->type)" in ichspi.c. We reuse the enum introduced for descriptor mode for the type of the new variable. Previously magic numbers were passed by chipset_enable wrappers. Now they use the enumeration items too. To get this working the enum definition had to be moved to programmer.h. Another noteworthy detail: previously we have checked for a valid programmer/ich generation all over the place. I have removed those checks and added one single check in the init method. Calling any function of a programmer without executing the init method first, is undefined behavior. Corresponding to flashrom svn r1460. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add (partially) dead support code for Intel Hardware SequencingStefan Tauner2011-10-201-13/+84
| | | | | | | | | | This was done to ease the review. Another patch will hook up (and explain) this code later. Corresponding to flashrom svn r1452. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: inform the user about the consequences of the security override strapStefan Tauner2011-09-181-0/+6
| | | | | | | | | | | | | | Ibex Peak SPI Programming Guide: The PCH has a mechanism to set up to 5 address ranges from HOST access. These are defined in PR0, PR1, PR2, PR3 and PR4 in the PCH EDS. These address ranges are NOT unlocked by assertion of Flash descriptor Override. Also, the datasheets mention the bit in their description of FRAP but not PR[N]. Corresponding to flashrom svn r1449. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: unlock PR register restrictions on ICH8+ if not locked downStefan Tauner2011-09-171-0/+27
| | | | | | | | | | | Tested-by: Shailendra Sodhi (predecessor/proof of concept patch) http://www.flashrom.org/pipermail/flashrom/2011-August/007717.html Corresponding to flashrom svn r1447. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add prettyprinting for PR registers on ICH8+Stefan Tauner2011-09-171-14/+30
| | | | | | | Corresponding to flashrom svn r1446. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: don't touch the nonexistent(?) BBAR register on ICH8Stefan Tauner2011-09-171-14/+12
| | | | | | | | | | | | | There is no sign of BBAR (BIOS Base Address Configuration Register) in the public datasheet (or specification update) of the ICH8. Also, the offset of that register has changed between ICH7 (SPIBAR + 50h) and ICH9 (SPIBAR + A0h), so we have no clue if or where it is on ICH8. Better don't try to touch it at all and assume/hope it is 0. Corresponding to flashrom svn r1445. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: improve prettyprint_opcodesStefan Tauner2011-09-171-12/+23
| | | | | | | | | Add headers for the columns and some decoding into human readable format. Corresponding to flashrom svn r1444. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add ICH/PCH flash descriptor decoding via FDOC/FDODStefan Tauner2011-09-151-11/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the work of Matthias 'mazzoo' Wenzel this patch adds pretty printing of those ICH/PCH flash descriptor sections that are cached/mapped by the chipset (and which are therefore reachable via FDOC/FDOD registers). this includes the following: - content section: describes the image and some generic properties (number of sections, offset of sections, PCH/ICH and MCH/PROC strap offsets and lengths) - component section: identify the different SPI flash chips and their capabilities. - region section similarly to a partition table this describes the different regions. the content of FLREG* is derived from this section. - master section defines SPI master (host, ME, GbE) access rights of the individual regions. the content of PR* is derived from this section. this is only a part of the data included in the descriptor. other information can be retrieved from a complete binary dump of the descriptor region only. this patch also adds macros and pretty printing for "Vendor Specific Component Capabilities" registers: there are two of them: lower and upper. they describe the properties of the address space divided by FPBA (which allows to use multiple flash chips or partitions with different properties). the properties of all supported flash chips (together with their RDIDs) are stored in the same format in table in a descriptor section (which is used by the ME apparently). a later patch will use the macros outside of ichspi.c which is the reason why the prettyprinting function and the register bit macros are not defined in ichspi.c but ich_descriptors.h (else they would be moved in the follow-up patch). because this patch relies on (compiler) implementation-specific layouting of bit-fields, it checks for correct layout before taking any action on runtime. Corresponding to flashrom svn r1443. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove unneeded inclusions of chipdrivers.hStefan Tauner2011-08-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | This is related to the spi split patch as discussed in: http://www.flashrom.org/pipermail/flashrom/2010-February/thread.html#2364 the old commit (r914) log notes: "Some of the spi programmer drivers required chipdrivers.h, needs fixing later: it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c bitbang_spi.c dediprog.c" there still remain a few cases where chipdrivers.h is needed: dediprog.c (spi_read_chunked and spi_write_chunked) it87spi.c (due to spi_write_enable and spi_read_status_register) wbsio_spi.c (spi_programmer registration only) besides that, there are also non-spi files that do not need it. also, add flash.h to chipdrivers.h because it uses some types of it and remove flashchips.h from print.c Corresponding to flashrom svn r1414. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* ichspi.c: refactor filling and reading the fdata/spid registersStefan Tauner2011-08-091-78/+57
| | | | | | | | | | | | - add ich_fill_data to fill the chipset registers from an array - add ich_read_data to copy the data from the chipset register into an array - replace the existing code with calls to those functions - minor cosmetic changes Corresponding to flashrom svn r1409. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Random whitespace and coding-style fixesUwe Hermann2011-07-281-1/+1
| | | | | | | | | | | | Also, indentation fixes, e.g. due to conversion to msg_*, use ARRAY_SIZE where possible, wrap overly long line, etc. Compile-tested. There should be no functional changes. Corresponding to flashrom svn r1397. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename CHIP_BUSTYPE_FOO to BUS_FOOCarl-Daniel Hailfinger2011-07-271-1/+1
| | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Corresponding to flashrom svn r1396. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* ichspi.c: do not print PBR[3] for ICH7 because it does not existStefan Tauner2011-07-241-1/+1
| | | | | | | | | | | | | Intel document 307013 (ICH7 datasheet) section 21.1.9 does only define PBR[0] (at SPIBAR + 60h) to PBR[2] (SPIBAR + 68h). SPIBAR + 6Ch and following are not defined, but we were printing them as PBR[3] anyway. i could not find any references to PBR[3] in documentation of other related chips (NM10, atom e6xx) either, hence kill it. Corresponding to flashrom svn r1381. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: print FADDR in ich_init_spiStefan Tauner2011-07-071-0/+2
| | | | | | | | | | We print the address registers for ICH7 and VIA at init. We should do so for ICH9 too. Corresponding to flashrom svn r1365. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: David Hendricks <dhendrix@google.com>
* ichspi.c: preserve reserved bits in address registersStefan Tauner2011-07-011-5/+8
| | | | | | | Corresponding to flashrom svn r1362. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: add FPB (Flash Partition Boundary) macros and init printingStefan Tauner2011-07-011-0/+7
| | | | | | | Corresponding to flashrom svn r1361. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: simplify ich_set_bbarStefan Tauner2011-07-011-27/+21
| | | | | | | | | Less code, documenting better what the differences are (i.e. offset of BBAR only). Corresponding to flashrom svn r1360. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: make REGWRITE* macros saferStefan Tauner2011-07-011-3/+3
| | | | | | | | | | | '+' does have a quite high precedence so "calling" those macros with a term including weaker operators in the off parameter may have unexpected consequences. Corresponding to flashrom svn r1359. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: add missing ICH9 register macros and eliminate magic numbersStefan Tauner2011-06-121-24/+33
| | | | | | | | | | | - add macros for FRAP, FREG0, PR0-PR4 and BBAR - eliminate magic numbers representing those registers and some other bits too - remove printing out the contents of FDOC because it is useless Corresponding to flashrom svn r1334. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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