1 files changed, 11 insertions, 8 deletions
diff --git a/satamv.c b/satamv.c
index 0c0dace..01919d0 100644
--- a/satamv.c
+++ b/satamv.c
@@ -40,6 +40,14 @@ const struct pcidev_status satas_mv[] = {
 #define PCI_BAR2_CONTROL		0x00c08
 #define GPIO_PORT_CONTROL		0x104f0
 
+static int satamv_shutdown(void *data)
+{
+	physunmap(mv_bar, 0x20000);
+	pci_cleanup(pacc);
+	release_io_perms();
+	return 0;
+}
+
 /*
  * Random notes:
  * FCE#		Flash Chip Enable
@@ -73,6 +81,9 @@ int satamv_init(void)
 	if (mv_bar == ERROR_PTR)
 		goto error_out;
 
+	if (register_shutdown(satamv_shutdown, NULL))
+		return 1;
+
 	tmp = pci_mmio_readl(mv_bar + FLASH_PARAM);
 	msg_pspew("Flash Parameters:\n");
 	msg_pspew("TurnOff=0x%01x\n", (tmp >> 0) & 0x7);
@@ -139,14 +150,6 @@ error_out:
 	return 1;
 }
 
-int satamv_shutdown(void)
-{
-	physunmap(mv_bar, 0x20000);
-	pci_cleanup(pacc);
-	release_io_perms();
-	return 0;
-}
-
 /* BAR2 (MEM) can map NVRAM and flash. We set it to flash in the init function.
  * If BAR2 is disabled, it still can be accessed indirectly via BAR1 (I/O).
  * This code only supports indirect accesses for now.