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authorDavid Borg <borg.db@gmail.com>2010-08-08 17:04:21 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-08-08 17:04:21 +0000
commitf8f28964297712ccecbf13480ad09cf9a57e9c98 (patch)
tree2b817e9a5155d9412626932ca935304fd87282e0 /nicnatsemi.c
parent23a6c0495367c33eb838ed03553f30b35b444b63 (diff)
downloadflashrom-f8f28964297712ccecbf13480ad09cf9a57e9c98.zip
flashrom-f8f28964297712ccecbf13480ad09cf9a57e9c98.tar.gz
Fix typo (s/Bit/Bits/) to clarify code comment
Corresponding to flashrom svn r1135. Signed-off-by: David Borg <borg.db@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'nicnatsemi.c')
-rw-r--r--nicnatsemi.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/nicnatsemi.c b/nicnatsemi.c
index 193a86e..1683857 100644
--- a/nicnatsemi.c
+++ b/nicnatsemi.c
@@ -68,8 +68,8 @@ void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr)
/*
* The datasheet requires 32 bit accesses to this register, but it seems
* that requirement might only apply if the register is memory mapped.
- * Bit 8-31 of this register are apparently don't care, and if this
- * register is I/O port mapped 8 bit accesses to the lowest byte of the
+ * Bits 8-31 of this register are apparently don't care, and if this
+ * register is I/O port mapped, 8 bit accesses to the lowest byte of the
* register seem to work fine. Due to that, we ignore the advice in the
* data sheet.
*/
@@ -82,8 +82,8 @@ uint8_t nicnatsemi_chip_readb(const chipaddr addr)
/*
* The datasheet requires 32 bit accesses to this register, but it seems
* that requirement might only apply if the register is memory mapped.
- * Bit 8-31 of this register are apparently don't care, and if this
- * register is I/O port mapped 8 bit accesses to the lowest byte of the
+ * Bits 8-31 of this register are apparently don't care, and if this
+ * register is I/O port mapped, 8 bit accesses to the lowest byte of the
* register seem to work fine. Due to that, we ignore the advice in the
* data sheet.
*/
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