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author | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2012-02-27 19:44:16 +0000 |
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committer | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2012-02-27 19:44:16 +0000 |
commit | 04d241d122aadd0882b9e16359f6eeb1f5a98a88 (patch) | |
tree | 5a16cac3a56a286693be400305be70765278366c /nicintel_spi.c | |
parent | 47f067ac3af066b1c524831d566a73f2dc4ce81d (diff) | |
download | flashrom-04d241d122aadd0882b9e16359f6eeb1f5a98a88.zip flashrom-04d241d122aadd0882b9e16359f6eeb1f5a98a88.tar.gz |
nicintel_spi.c: check if write enable is really set (and minor comment changes)
Corresponding to flashrom svn r1510.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Diffstat (limited to 'nicintel_spi.c')
-rw-r--r-- | nicintel_spi.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/nicintel_spi.c b/nicintel_spi.c index f9432ec..4ff8554 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -31,12 +31,15 @@ #define PCI_VENDOR_ID_INTEL 0x8086 +/* EEPROM/Flash Control & Data Register */ #define EECD 0x10 +/* Flash Access Register */ #define FLA 0x1c /* * Register bits of EECD. - * + * Table 13-6 + * * Bit 04, 05: FWE (Flash Write Enable Control) * 00b = not allowed * 01b = flash writes disabled @@ -46,8 +49,9 @@ #define FLASH_WRITES_DISABLED 0x10 /* FWE: 10000b */ #define FLASH_WRITES_ENABLED 0x20 /* FWE: 100000b */ -/* Flash Access register bits */ -/* Table 13-9 */ +/* Flash Access register bits + * Table 13-9 + */ #define FL_SCK 0 #define FL_CS 1 #define FL_SI 2 @@ -179,6 +183,13 @@ int nicintel_spi_init(void) tmp |= FLASH_WRITES_ENABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD); + /* test if FWE is really set to allow writes */ + tmp = pci_mmio_readl(nicintel_spibar + EECD); + if ( (tmp & FLASH_WRITES_DISABLED) || !(tmp & FLASH_WRITES_ENABLED) ) { + msg_perr("Enabling flash write access failed.\n"); + return 1; + } + if (register_shutdown(nicintel_spi_shutdown, NULL)) return 1; |