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authorMichael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>2009-11-27 17:49:42 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-11-27 17:49:42 +0000
commit859a2167790eebd01b9b4dcf860c8a69e8278063 (patch)
treeccbfa84c583ef476bca4aa6015d65b63ad291679 /m29f400bt.c
parenta70a5cec0c68f08fb9204483fb47071e6c09e316 (diff)
downloadflashrom-859a2167790eebd01b9b4dcf860c8a69e8278063.zip
flashrom-859a2167790eebd01b9b4dcf860c8a69e8278063.tar.gz
Use common jedec functionality where appropriate
The deleted function in en29f002a.c is reintroduced as write_by_byte_jedec in jedec.c as it contains no chip-specific instructions. It is not yet used in other chip drivers, as key addresses (0x2AAA/0x5555) are often specified with less bits. After crosschecking datasheets, most of the fixmes can probably be resolved as indicated in them, causing significant code reduction. The common JEDEC code for bytewise programming does not program 0xFF at all. The chips that had a dedicated bytewise flash function which has been changed to write_jedec_1 thus changed flashing behaviour and the "write" test flag has been removed. This applies to: AMD Am29F002BB/Am29F002NBB AMD Am29F002BT/Am29F002NBT (TEST_OK_PREW before) AMIC A29002B AMIC A29002T (TEST_OK_PREW before) EON EN29F002(A)(N)B EON EN29F002(A)(N)T (TEST_OK_PREW before) Macronix MX29F001B (TEST_OK_PREW before) Macronix MX29F001T (TEST_OK_PREW before) Macronix MX29F002B Macronix MX29F002T (TEST_OK_PREW before) Macronix MX29LV040 Similar analysis should be performed for the read id stuff. Corresponding to flashrom svn r785. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'm29f400bt.c')
-rw-r--r--m29f400bt.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/m29f400bt.c b/m29f400bt.c
index 5c36db9..c327f44 100644
--- a/m29f400bt.c
+++ b/m29f400bt.c
@@ -20,6 +20,12 @@
#include "flash.h"
+/* WARNING!
+ This chip uses the standard JEDEC Addresses in 16-bit mode as word
+ addresses. In byte mode, 0xAAA has to be used instead of 0x555 and
+ 0x555 instead of 0x2AA. Do *not* blindly replace with standard JEDEC
+ functions. */
+
void write_page_m29f400bt(chipaddr bios, uint8_t *src,
chipaddr dst, int page_size)
{
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