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| author | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2011-07-24 15:34:56 +0000 |
|---|---|---|
| committer | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2011-07-24 15:34:56 +0000 |
| commit | 023359479c17236c5a1fec0c08c7c74c332cf9dc (patch) | |
| tree | 8606eced9c4d02c7315b9572815b1e022f28f231 /ichspi.c | |
| parent | 4fff819f1e27ef76c03e88032c62ffcde32d6d48 (diff) | |
| download | flashrom-023359479c17236c5a1fec0c08c7c74c332cf9dc.zip flashrom-023359479c17236c5a1fec0c08c7c74c332cf9dc.tar.gz | |
ichspi.c: do not print PBR[3] for ICH7 because it does not exist
Intel document 307013 (ICH7 datasheet) section 21.1.9 does only
define PBR[0] (at SPIBAR + 60h) to PBR[2] (SPIBAR + 68h). SPIBAR + 6Ch
and following are not defined, but we were printing them as PBR[3]
anyway. i could not find any references to PBR[3] in documentation of
other related chips (NM10, atom e6xx) either, hence kill it.
Corresponding to flashrom svn r1381.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'ichspi.c')
| -rw-r--r-- | ichspi.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -1263,7 +1263,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, mmio_readl(ich_spibar + 0x58)); msg_pdbg("0x5c: 0x%08x (OPMENU+4)\n", mmio_readl(ich_spibar + 0x5c)); - for (i = 0; i < 4; i++) { + for (i = 0; i < 3; i++) { int offs; offs = 0x60 + (i * 4); msg_pdbg("0x%02x: 0x%08x (PBR%d)\n", offs, |
