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authorDuncan Laurie <dlaurie@chromium.org>2014-08-20 15:39:32 +0000
committerStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2014-08-20 15:39:32 +0000
commit9e753f401f3c9fb1c6f00c8f5c35bec826b7689c (patch)
treedeaca4de25e5bafc24fe0a48a401a8d4f062a170 /ich_descriptors.c
parent5e193108ae2d7debd0e18d0d8e1f72c0142754e6 (diff)
downloadflashrom-9e753f401f3c9fb1c6f00c8f5c35bec826b7689c.zip
flashrom-9e753f401f3c9fb1c6f00c8f5c35bec826b7689c.tar.gz
Add support for Intel Silvermont: Bay Trail, Rangeley and Avoton
The core of this patch to support Bay Trail originally came from the Chromiumos flashrom repo and was modified by Sage to support the Rangeley/Avoton parts as well. Because that was not complicated enough already Stefan Tauner refactored and refined everything. Bay Trail seems to be the first Atom SoC able to support hwseq. No SPI Programming Guide could be obtained so it is handled similarly to Lynx Point which seems to be its nearest relative. Tested-by: Marc Jones <marcj303@gmail.com> Tested-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Tested-by: Thomas Reardon <thomas_reardon@hotmail.com> Tested-by: Wen Wang <wen.wang@adiengineering.com> Corresponding to flashrom svn r1844. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Martin Roth <gaumless@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Marc Jones <marcj303@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Diffstat (limited to 'ich_descriptors.c')
-rw-r--r--ich_descriptors.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/ich_descriptors.c b/ich_descriptors.c
index b1e081f..90f3150 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -139,6 +139,7 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript
return size_str[size_enc];
}
case CHIPSET_8_SERIES_LYNX_POINT:
+ case CHIPSET_BAYTRAIL:
case CHIPSET_8_SERIES_LYNX_POINT_LP:
case CHIPSET_8_SERIES_WELLSBURG: {
uint8_t size_enc;
@@ -180,6 +181,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value)
case CHIPSET_6_SERIES_COUGAR_POINT:
case CHIPSET_7_SERIES_PANTHER_POINT:
case CHIPSET_8_SERIES_LYNX_POINT:
+ case CHIPSET_BAYTRAIL:
case CHIPSET_8_SERIES_LYNX_POINT_LP:
case CHIPSET_8_SERIES_WELLSBURG:
return freq_str[value];
@@ -820,6 +822,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors
size_max = 5;
break;
case CHIPSET_8_SERIES_LYNX_POINT:
+ case CHIPSET_BAYTRAIL:
case CHIPSET_8_SERIES_LYNX_POINT_LP:
case CHIPSET_8_SERIES_WELLSBURG:
if (idx == 0) {
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